FPGA AI Suite: SoC Design Example User Guide

ID 768979
Date 7/31/2024
Public
Document Table of Contents

B. FPGA AI Suite SoC Design Example User Guide Document Revision History

Document Version FPGA AI SuiteVersion Changes
2024.07.31 2024.2
  • Revised " Agilex™ 7 FPGA I-Series Transceiver-SoC Development Kit Hardware Requirements".
  • Updated required Quartus® Prime Pro Edition version to Version 24.2.
2024.03.29 2024.1
  • Updated the document for Ubuntu* 22.04 support.
  • Updated required Quartus® Prime Pro Edition version to Version 23.4.
2024.02.12 2023.3.1
  • Updated the document for Agilex™ 7 FPGA I-Series Transceiver-SoC Development Kit support, including the following new topics:
    • "Preparing the Intel Agilex 7 FPGA I-Series Transceiver-SoC Development Kit "
    • "Confirming Intel Agilex 7 FPGA I-Series Transceiver-SoC Development Kit Board Set Up"
    • "Programming the Intel Agilex 7FPGA Device with the JTAG Indirect Configuration (.jic) File"
    • "Connecting the Intel Agilex 7 FPGA I-Series Transceiver-SoC Development Kit to the Host Development System"
2023.12.01 2023.3
  • Updated required Quartus® Prime Pro Edition version to Version 23.3.
2023.09.06 2023.2.1
  • Updated supported OpenVINO™ version to 2022.3.1 LTS.
2023.07.03 2023.2
  • Updated supported OpenVINO™ version to 2022.3 LTS.
  • Updated OpenVINO™ installation paths to /opt/intel/openvino_2023.
  • Updated FPGA AI Suite installation paths to /opt/intel/fpga_ai_suite_2023.2.
  • Changed occurrences of tools/downloader/downloader.py to omz_downloader.
  • Changed occurrences of tools/downloader/converter.py to omz_converter.
2023.04.05 2023.1
  • Initial release.