Nios® V Processor Software Developer Handbook

ID 743810
Date 10/02/2023
Public

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Document Table of Contents

6.13.1. Memory Sections

By default, HAL-based systems are linked using a generated linker script that is created by the Nios® V processor tools. This linker script controls the mapping of code and data to the available memory sections. The autogenerated linker script creates standard code and data sections (.text, .rodata, .rwdata, and .bss), plus a section for each physical memory device in the system. For example, if a memory component named sdram is defined in the system.h file, there is a memory section named .sdram.

The memory devices that contain the Nios® V processor’s reset and exception addresses are a special case. The Nios® V processor tools construct the 32-byte .entry section starting at the reset address. This section is reserved exclusively for the use of the reset handler. Similarly, the tools construct a .exceptions section, starting at the exception address.

In a memory device containing the reset or exception address, the linker creates a normal (nonreserved) memory section above the .entry or .exceptions section. If there is a region of memory below the .entry or .exceptions section, it is unavailable to the Nios® V processor software.