AN 952: Intel® Arria® 10 and Intel® Stratix® 10 HDMI 2.1 System Design Guidelines

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ID 709310
Date 6/21/2022
Public
Document Table of Contents
Document Table of Contents x
1. Terms and Acronyms 2. Introduction 3. Prerequisites and Scope 4. System Design Guidelines Requirements 5. HDMI 2.1 Compliance Test Specification 6. Future System Level Optimization 7. Document Revision History for AN 952: Intel® Arria® 10 and Intel® Stratix® 10 HDMI 2.1 System Design Guidelines
4. System Design Guidelines Requirements x
4.1. Enabling PCB panel design 4.2. PCB Best Practices 4.3. System Link Budgeting Recommendations
4.3. System Link Budgeting Recommendations x
4.3.1. FPGA TX Settings 4.3.2. FPGA RX Settings
4.3.2. FPGA RX Settings x
4.3.2.1. Intel® Stratix® 10-specific RX Feature
5. HDMI 2.1 Compliance Test Specification x
5.1. Protocol IP Compliance Test Specification 5.2. Electrical Compliance Test Specification 5.3. Performance and Cost Considerations
6. Future System Level Optimization x
6.1. Availability of Redrivers or Retimers 6.2. The Intel Agilex® Platform
1. Terms and Acronyms
2. Introduction
3. Prerequisites and Scope
4. System Design Guidelines Requirements
5. HDMI 2.1 Compliance Test Specification
6. Future System Level Optimization
7. Document Revision History for AN 952: Intel® Arria® 10 and Intel® Stratix® 10 HDMI 2.1 System Design Guidelines

3. Prerequisites and Scope

Before you begin, Intel® recommends that you do the following:
  1. Understand all HDMI 2.1 CTS requirements per HDMI.Org and strive to meet both Protocol and Electrical Specifications.
  2. Refer to all existing platform level resources such as Development Kit Guides, Platform Design Guides (PDG), and Application Notes (AN).

You can use an existing development kit together with this system design guide to enable a HDMI 2.1 capable system. If you require an accelerated Time to Market (TTM) product roadmap, you can use the daughtercard design recommendations and Intel development kit. If you choose to create a proprietary design, use this guide to help you develop a compliant design that saves time and cost.

The reference design has passed HDMI 2.1 CTS test suite, with electrical attributes characterized by Electrical Validation and settings optimized to development kit setup.

Protect your silicon from damage caused by Electrostatic Discharge (ESD) events in a typical usage model. Intel® Arria® 10 and Intel® Stratix® 10 devices that use redrivers or retimers do not require additional ESD clamp circuitry. Do assess the ESD requirements of your design.

While the recommendations in this guide are based on HDMI 2.1 daughtercard development iterations, they are also applicable to other board topologies. Therefore, in these subsequent pages, this document uses the PCB panel to describe the design in general.

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