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Step 1: Getting Started
Step 2: Creating a Design Partition
Step 3: Allocating Placement and Routing Region for a PR Partition
Step 4: Defining Personas
Step 5: Creating Revisions
Step 6: Compiling the Base Revision
Step 7: Preparing PR Implementation Revisions
Step 8: Programming the Board
Modifying an Existing Persona
Adding a New Persona to the Design
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Document Revision History for AN 825: Partially Reconfiguring a Design on Intel® Stratix® 10 GX FPGA Development Board
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2020.12.07 | 20.3 |
|
2019.08.06 | 19.1 |
|
2019.07.15 | 19.1 |
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2018.09.24 | 18.1 |
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2018.05.07 | 18.0 |
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2017.11.06 |
17.1 |
Initial release of the document. |