AN 825: Partially Reconfiguring a Design: on Intel® Stratix® 10 GX FPGA Development Board

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ID 683880
Date 12/07/2020
Public
Document Table of Contents
Document Table of Contents x
Partially Reconfiguring a Design on Intel® Stratix® 10 GX FPGA Development Board
Partially Reconfiguring a Design on Intel® Stratix® 10 GX FPGA Development Board x
Reference Design Requirements Reference Design Overview Reference Design Files Reference Design Walkthrough Document Revision History for AN 825: Partially Reconfiguring a Design on Intel® Stratix® 10 GX FPGA Development Board
Reference Design Walkthrough x
Step 1: Getting Started Step 2: Creating a Design Partition Step 3: Allocating Placement and Routing Region for a PR Partition Step 4: Defining Personas Step 5: Creating Revisions Step 6: Compiling the Base Revision Step 7: Preparing PR Implementation Revisions Step 8: Programming the Board Modifying an Existing Persona Adding a New Persona to the Design
Step 5: Creating Revisions x
Setting the Base Revision Type Creating Implementation Revisions
Step 8: Programming the Board x
Troubleshooting PR Programming Errors
Partially Reconfiguring a Design on Intel® Stratix® 10 GX FPGA Development Board

Adding a New Persona to the Design

After fully compiling your base revisions, you can still add new personas and individually compile these personas.

For example, to define a new persona that keeps one LED on and the other LED off:

  1. Copy blinking_led_empty.sv to blinking_led_wink.sv.
  2. In the blinking_led_wink.sv file, modify the assignment, assign led_three_on = 1'b0; to assign led_three_on = 1'b1;.
  3. Create a new implementation revision, blinking_led_wink, by following the steps in Creating Implementation Revisions.
    Note: The blinking_led_wink revision must use the blinking_led_wink.sv file, and use the blinking_led_wink entity name in the entity rebinding assignment.
  4. Compile the revision by clicking Processing > Start Compilation.
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