F-tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 12/15/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.14.1.6. Preserving Unused Lanes

FHT PMA supports preservation of unused PMA lanes that you plan to use in the next iteration of your FPGA design.

Write 4'b1111 to cfg_preserve_enable (0xF0030[3:0]) to preserve all the unused lanes in a FHT PMA.

Note: Set this register to zeros for normal operation. This is a common register for all four lanes. LSB is for lane 0 and MSB is for lane 3.