1.1. Intel® Stratix® 10 HPS Peripherals that Support Routing to the FPGA
The following types of Intel® Stratix® 10 HPS peripherals are capable of routing to the FPGA fabric:
- Secure Digital/Multimedia Card (SD/MMC)
- Ethernet Media Access Controller (EMAC)
- Serial Peripheral Interface (SPI)
- Universal Asynchronous Receiver/Transmitter (UART)
- Inter-Integrated Circuit (I2C)
- NAND Flash Controller
- TRACE Interface
In many cases, routing the HPS IP signals to the FPGA external interface allows more signals to be exposed.
Peripherals | Interface Description | |
---|---|---|
HPS Domain |
FPGA Domain |
|
SD/MMC | Standard SD/MMC interface with up to 8-bit data bus | Standard SD/MMC interface, including:
|
EMAC |
RMII and RGMII Interface |
MII, GMII, RMII, RGMII, SGMII |
SPI Master |
MOSI/MISO SPI interface configurable to single or dual slaves |
MOSI/MISO SPI interface with output enables that support up to four slaves; interface achieved by connecting exported signals to bidirectional buffers |
SPI Slave |
MOSI/MISO SPI interface configurable to single master |
MOSI/MISO SPI interface configurable to single master with output enables |
UART |
Standard UART interface with flow control signals |
Standard UART interface with flow control signals, including DSR, DCD, RI, and DTR; and two user-defined output signals are also available |
I2C |
Standard I2C interface |
Standard I2C interface achieved by connecting exported signals to a bidirectional buffer |
NAND Flash Controller | Standard NAND Interface with 8- or 16-bit of data and one set of CE and R/B signals | Standard NAND Interface with 8- or 16-bit of data and four sets of CE and R/B signals |
TRACE | TRACE debug interface | TRACE debug interface |
For a description of each of the peripheral signal interfaces listed above, refer to the corresponding chapters in the Intel® Stratix® 10 Hard Processor System Technical Reference Manual.