AN 923: Routing Intel® Stratix® 10 HPS Peripherals to FPGA Fabric

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ID 683838
Date 10/12/2020
Public
Document Table of Contents
Document Table of Contents x
1. AN 923: Routing Intel® Stratix® 10 HPS Peripherals to FPGA Fabric
1. AN 923: Routing Intel® Stratix® 10 HPS Peripherals to FPGA Fabric x
1.1. Intel® Stratix® 10 HPS Peripherals that Support Routing to the FPGA 1.2. Design Example: Intel® Stratix® 10 HPS IP Interface to FPGA 1.3. Document Revision History for the AN 923: Routing Intel® Stratix® 10 HPS Peripherals to FPGA Fabric
1.2. Design Example: Intel® Stratix® 10 HPS IP Interface to FPGA x
1.2.1. Prerequisites 1.2.2. Getting Started 1.2.3. Generating the Initial HDL in Platform Designer 1.2.4. Modifying Top Level File 1.2.5. Adding Pin Assignments for SPIM0 1.2.6. Hardware Programming File Compilation and Generation 1.2.7. Building U-Boot 1.2.8. Preparing QSPI Image 1.2.9. Building Linux 1.2.10. Building Yocto Rootfs 1.2.11. Building spidev Test Program 1.2.12. Creating SD Card Image 1.2.13. Booting the Board 1.2.14. Testing the SPIM0
1.2.1. Prerequisites x
1.2.1.1. Hardware Requirements 1.2.1.2. Software Requirements
1. AN 923: Routing Intel® Stratix® 10 HPS Peripherals to FPGA Fabric

1. AN 923: Routing Intel® Stratix® 10 HPS Peripherals to FPGA Fabric

Updated for:
Intel® Quartus® Prime Design Suite 20.3

The Intel® Stratix® 10 SoC device families integrate an Arm* Cortex-A53-based hard processor system (HPS) consisting of processor, peripherals, and memory interface with the FPGA fabric using a high-bandwidth interconnect backbone. The Intel® Stratix® 10 HPS interface provides up to 48 I/O pins to share with multiple peripherals through sets of configurable multiplexers.

This application note describes the steps required to route an HPS peripheral through the FPGA interface using Platform Designer and Intel® Quartus® Prime Pro Edition software version software. A simple design example is included to demonstrate exporting HPS SPIM0 peripheral signals to the FPGA interface using an Intel® Stratix® 10 SoC Development Kit.
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