Visible to Intel only — GUID: sen1615420132546
Ixiasoft
Visible to Intel only — GUID: sen1615420132546
Ixiasoft
1.11.3. PR Bitstream Encryption ( Intel® Stratix® 10 Designs)
In PR bitstream encryption, you must first configure the device with the encrypted base bitstream. Next, you configure one or more partial reconfiguration regions with the encrypted PR bitstream. The encrypted PR bitstream must match the configured static region.
You also can configure the signed PR bitstream after the first encrypted base bitstream configuration. For all subsequent partial reconfigurations, both the signed and encrypted PR bitstreams are supported.
PR bitstream encryption requires the following prerequisite conditions:
- The Base and PR designs must share the same authentication key.
- The Base and PR designs must share the same encryption key.
- All PR regions must be encrypted or none. A combination of encrypted and non-encrypted designs is unsupported.
- When you enable authentication, both the base and the PR design must be authenticated. This requirement ensures that only authorized users can provide the full or PR bitstream to the owned FPGA device.
- When you enable authentication or encryption, the Intel® Quartus® Prime Assembler skips the auto-generation of .rbf files for PR designs, and only generates the .pmsf file.