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1. Intel® Stratix® 10 Variable Precision DSP Blocks Overview
2. Block Architecture Overview
3. Operational Mode Descriptions
4. Design Considerations
5. Intel® Stratix® 10 Variable Precision DSP Blocks Implementation Guide
6. Native Fixed Point DSP Intel® Stratix® 10 FPGA IP Core References
7. Multiply Adder IP Core References
8. ALTMULT_COMPLEX Intel® FPGA IP Core Reference
9. LPM_MULT Intel® FPGA IP Core References
10. Native Floating Point DSP Intel® Stratix® 10 FPGA IP References
11. LPM_DIVIDE (Divider) Intel FPGA IP Core
12. Intel® Stratix® 10 Variable Precision DSP Blocks User Guide Document Archives
13. Document Revision History for the Intel® Stratix® 10 Variable Precision DSP Blocks User Guide
2.1. Input Register Bank for Fixed-Point and Floating-Point Arithmetic
2.2. Pipeline Registers for Fixed-Point and Floating-Point Arithmetic
2.3. Pre-adder for Fixed-Point Arithmetic
2.4. Internal Coefficient for Fixed-Point Arithmetic
2.5. Multipliers for Fixed-Point and Floating-Point Arithmetic
2.6. Adder or Subtractor for Fixed-Point and Floating-Point Arithmetic
2.7. Accumulator, Chainout Adder, and Preload Constant for Fixed-Point Arithmetic
2.8. Systolic Register for Fixed-Point Arithmetic
2.9. Double Accumulation Register for Fixed-Point Arithmetic
2.10. Output Register Bank for Fixed-Point and Floating-Point Arithmetic
2.11. Exception Handling for Floating-Point Arithmetic
10.1. Native Floating Point DSP Intel® Stratix® 10 FPGA IP Release Information
10.2. Native Floating Point DSP Intel® Stratix® 10 FPGA IP Core Supported Operational Modes
10.3. Parameterizing the Native Floating Point DSP Intel® Stratix® 10 FPGA IP
10.4. Native Floating Point DSP Intel® Stratix® 10 FPGA IP Core Signals
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13. Document Revision History for the Intel® Stratix® 10 Variable Precision DSP Blocks User Guide
Document Version | Intel® Quartus® Prime Version | Changes |
---|---|---|
2021.08.13 | 21.2 |
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2020.09.28 | 20.3 |
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2020.04.26 | 19.3 |
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2019.10.22 | 19.3 |
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2018.09.24 | 18.1 |
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2018.05.07 | 18.0 |
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Date | Version | Changes |
---|---|---|
November 2017 | 2017.11.06 |
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May 2017 | 2017.05.08 | Updated the behavior description of the sload_accum and accum_sload signals in the ALTERA_MULT_ADD Input Signals table. |
October 2016 | 2016.10.31 | Initial release. |