OpenCL* on Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA Quick Start User Guide

Download PDF
ID 683831
Date 6/05/2020
Public
Document Table of Contents
Document Table of Contents x
1. About this Document 2. Setting Up the Host Machine 3. Running Diagnostics 4. OpenCL* Support for Multi-Card Systems 5. Running Samples 6. Compiling OpenCL* Kernels 7. Intel® PAC with Intel® Arria® 10 GX FPGA Security for OpenCL* Applications 8. OpenCL* on the Intel® PAC with Intel® Arria® 10 GX FPGA Quick Start User Guide Archives 9. Document Revision History for OpenCL* Quick Start User Guide Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA
1. About this Document x
1.1. Conventions 1.2. Acceleration Glossary 1.3. Acronyms
2. Setting Up the Host Machine x
2.1. Introduction 2.2. Initializing the Environment for OpenCL* with Intel Acceleration Stack 2.3. Initializing the Intel® Acceleration Stack for OpenCL* in a Virtualized Environment
2.1. Introduction x
2.1.1. Release Content
5. Running Samples x
5.1. Running Hello World 5.2. Running Vector Add
6. Compiling OpenCL* Kernels x
6.1. Checking Timing Results
1. About this Document
2. Setting Up the Host Machine
3. Running Diagnostics
4. OpenCL* Support for Multi-Card Systems
5. Running Samples
6. Compiling OpenCL* Kernels
7. Intel® PAC with Intel® Arria® 10 GX FPGA Security for OpenCL* Applications
8. OpenCL* on the Intel® PAC with Intel® Arria® 10 GX FPGA Quick Start User Guide Archives
9. Document Revision History for OpenCL* Quick Start User Guide Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA

7. Intel® PAC with Intel® Arria® 10 GX FPGA Security for OpenCL* Applications

The Intel® PAC with Intel® Arria® 10 GX FPGA allows you to enable security features such as Root of Trust (RoT) and AFU signing for the designs to be loaded onto it. The Intel® PAC with Intel® Arria® 10 GX FPGA containing a hardware image (FIM) version 1.2.1 or greater requires an AFU to have the prepended signature blocks, even if an AFU root entry hash has not been programmed. To determine the FIM version installed on your board, follow the instructions from the section Identifying the Flash Image and BMC Firmware. Intel® 's PAC sign allows you to prepend the required blocks with an empty signature chain. Please refer to the Intel FPGA PAC Security Guide to see how to create the keys. After you create the keys, follow the instructions from section Signing OpenCL Images to create signed or unsigned OpenCL* images. If you have any version of FIM prior to 1.2.1, you need to perform a one-time secure update to enable the security features.

Related Information
Level Two Title