OpenCL* on Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA Quick Start User Guide

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ID 683831
Date 6/05/2020
Public
Document Table of Contents
Document Table of Contents x
1. About this Document 2. Setting Up the Host Machine 3. Running Diagnostics 4. OpenCL* Support for Multi-Card Systems 5. Running Samples 6. Compiling OpenCL* Kernels 7. Intel® PAC with Intel® Arria® 10 GX FPGA Security for OpenCL* Applications 8. OpenCL* on the Intel® PAC with Intel® Arria® 10 GX FPGA Quick Start User Guide Archives 9. Document Revision History for OpenCL* Quick Start User Guide Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA
1. About this Document x
1.1. Conventions 1.2. Acceleration Glossary 1.3. Acronyms
2. Setting Up the Host Machine x
2.1. Introduction 2.2. Initializing the Environment for OpenCL* with Intel Acceleration Stack 2.3. Initializing the Intel® Acceleration Stack for OpenCL* in a Virtualized Environment
2.1. Introduction x
2.1.1. Release Content
5. Running Samples x
5.1. Running Hello World 5.2. Running Vector Add
6. Compiling OpenCL* Kernels x
6.1. Checking Timing Results
1. About this Document
2. Setting Up the Host Machine
3. Running Diagnostics
4. OpenCL* Support for Multi-Card Systems
5. Running Samples
6. Compiling OpenCL* Kernels
7. Intel® PAC with Intel® Arria® 10 GX FPGA Security for OpenCL* Applications
8. OpenCL* on the Intel® PAC with Intel® Arria® 10 GX FPGA Quick Start User Guide Archives
9. Document Revision History for OpenCL* Quick Start User Guide Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA

5.2. Running Vector Add

  1. Extract example: 
    cd $OPAE_PLATFORM_ROOT/opencl

mkdir exm_opencl_vector_add_x64_linux

cd exm_opencl_vector_add_x64_linux

tar xzvf ../exm_opencl_vector_add_x64_linux.tgz
  2. Build example: 
    cd vector_add

make
  3. Copy precompiled OpenCL* kernel to bin folder: 
    cp $OPAE_PLATFORM_ROOT/opencl/vector_add.aocx ./bin
  4. Program the aocx file: 
    aocl program acl0 ./bin/vector_add.aocx
    Note: This step is not necessary for non SR-IOV enabled system as OpenCL* by default performs partial reconfiguration to program the new kernel on FPGA. The aocx file in the release OpenCL* folder is unsigned. If you are using Intel® PAC features and programming a signed aocx file to the device, ensure that you copy the same file in the bin before running. Also, make sure that you rename the file to vector_add.aocx because the hose code looks for the specific name of the kernel.
    Example sample output: 
    Running program from /home/<username>/intelrtestack/d5005_ias_2_0_1_b237/opencl/opencl_bsp/linux64/libexec
Program succeed.
  5. Run example: 
    ./bin/host
    Example sample output: 
    Initializing OpenCL
Platform: Intel(R) FPGA SDK for OpenCL(TM)
Using 1 device(s)
	  pac_a10 : Intel PAC Platform (pac_ec00000)
Using AOCX: vector_add.aocx
Launching for device 0 (1000000 elements)

	Time: 227.021 ms
	Kernel time (device 0): 218.247 ms


	Verification: PASS


    Initializing OpenCL
Platform: Intel(R) FPGA SDK for OpenCL(TM)
Using 2 device(s)
  pac_s10_dc : Intel PAC Platform (pac_ee00001)
  pac_s10_dc : Intel PAC Platform (pac_ee00000)
Using AOCX: vector_add.aocx
Launching for device 0 (500000 elements)
Launching for device 1 (500000 elements)

Time: 6.814 ms
Kernel time (device 0): 1.817 ms
Kernel time (device 1): 2.094 ms

Verification: PASS
Level Two Title