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1. About this Document
2. Setting Up the Host Machine
3. Running Diagnostics
4. OpenCL* Support for Multi-Card Systems
5. Running Samples
6. Compiling OpenCL* Kernels
7. Intel® PAC with Intel® Arria® 10 GX FPGA Security for OpenCL* Applications
8. OpenCL* on the Intel® PAC with Intel® Arria® 10 GX FPGA Quick Start User Guide Archives
9. Document Revision History for OpenCL* Quick Start User Guide Intel® Programmable Acceleration Card with Intel® Arria® 10 GX FPGA
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6.1. Checking Timing Results
Intel® recommends that you check for timing failures after compilation of the kernel file.
Check the compilation directory for the presence of the following report files:
afu_default.failing_clocks.rpt
afu_default.failing_paths.rpt
For example, after compiling vector_add.cl, locate the $OPAE_PLATFORM_ROOT/opencl/vector_add/bin/vector_add directory. If there is a timing violation, this directory contains the failing report files. The failing report files indicate that the timing is not clean and the functional correctness cannot be guaranteed.
If OpenCL* kernel compilation results in timing violations, Intel® recommends to retry compilation with a different seed (aoc <kernel.cl> -seed=<integer_value> ).
For example,
aoc device/vector_add.cl -seed=2 -o bin/vector_add.aocx -board pac_s10_dc
aoc device/vector_add.cl -seed=3 -o bin/vector_add.aocx -board pac_s10_dc
aoc device/vector_add.cl -seed=63 -o bin/vector_add.aocx -board pac_s10_dc