Multi Channel DMA Intel® FPGA IP for PCI Express* User Guide

ID 683821
Date 10/06/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.1.1. Endpoint Mode

  • MCDMA P-Tile: PCIe Gen4/Gen3 x16/x8 and 2x8 ports in Intel® Stratix® 10 DX and Intel Agilex® 7 devices.
  • MCDMA H-Tile: PCIe Gen3 x16/x8 in Intel® Stratix® 10 GX and Intel® Stratix® 10 MX devices.
  • MCDMA F-Tile: PCIe Gen4/Gen3 x16/x8/x4 and 2x8 ports in Intel Agilex® 7 device
  • MCDMA R-Tile:
    • PCIe Gen5/Gen4/Gen3 2x8 in Intel Agilex® 7 devices.
    • PCIe Gen4/Gen3 x16 only in Intel Agilex® 7 I-Series FPGA Development Kit DK-DEV-AGI027R1BES R-Tile B0 revision.
    • PCIe Gen5/Gen4/Gen3 4x4 only in Intel Agilex® 7 I-Series FPGA Development Kit DK-DEV- AGI027R1BES R-Tile B0 revision. Port 2 and 3 don't support SRIOV, FLR, user event MSI-X and MSI capability. Port 2 and 3 only support BAM, BAS and BAM+BAS user mode.
  • User Mode options:
    • Multi Channel DMA
    • Bursting Avalon Master (BAM)
    • Bursting Avalon Slave (BAS)
    • BAM and BAS
    • BAM and MCDMA
    • Data Mover Only (available in MCDMA P-Tile IP and MCDMA F-Tile IP and MCDMA R-Tile IP)
    • BAM, BAS and MCDMA
  • Supports up to 2K DMA channels.
    • Table 2.  Maximum DMA channels
      Device MCDMA Interface Type
      AVMM AVST

      Intel® Stratix® 10 GX

      Intel® Stratix® 10 MX

      Intel® Stratix® 10 DX

      Intel Agilex® 7

      2048* 2048*
      Note: * = Maximum 512 channels per Function
  • Per Descriptor completion notification with MSI-X or Writebacks
  • Option to select Avalon-MM or Avalon-ST DMA for user logic interface
  • SR-IOV
  • User MSI-X in MCDMA mode
  • User FLR in MCDMA mode
  • 10-bit tag feature
  • MSI Interrupt in BAS (only available for R-Tile MCDMA IP, P-Tile MCDMA IP and F-Tile MCDMA IP). H-Tile MCDMA IP do not support MSI Interrupt feature.
  • H2D address and payload size alignment to byte granularity for AVST
  • Maximum payload size supported:
    • Intel® Stratix® 10 GX and Intel® Stratix® 10 MX devices: 512 bytes
    • Intel® Stratix® 10 DX and Intel Agilex® 7 devices: 512 / 256 / 128 bytes