Visible to Intel only — GUID: qve1499221466877
Ixiasoft
1.1. Supported Devices
1.2. Features
1.3. Operating Conditions
1.4. Pin Information
1.5. Device Package and Ordering Code
1.6. Memory Array Organization
1.7. Memory Operations
1.8. Status Register
1.9. Summary of Operation Codes
1.10. Power Mode
1.11. Timing Information
1.12. Programming and Configuration File Support
1.13. Appendix: SFDP Register Definitions
1.14. Document Revision History for the EPCQ-A Serial Configuration Device Datasheet
1.9.1. Read Bytes Operation (03h)
1.9.2. Fast Read Operation (0Bh)
1.9.3. Extended Dual Input Fast Read Operation (BBh)
1.9.4. Extended Quad Input Fast Read Operation (EBh)
1.9.5. Read Device Identification Operation (9Fh)
1.9.6. Read Silicon Identification Operation (ABh)
1.9.7. Write Enable Operation (06h)
1.9.8. Write Disable Operation (04h)
1.9.9. Write Bytes Operation (02h)
1.9.10. Quad Input Fast Write Bytes Operation (32h)
1.9.11. Erase Bulk Operation (C7h)
1.9.12. Erase Sector Operation (D8h)
1.9.13. Erase Subsector Operation (20h)
1.9.14. Read SFDP Register Operation (5Ah)
Visible to Intel only — GUID: qve1499221466877
Ixiasoft
1.9. Summary of Operation Codes
Operation | Operation Code 7 | Address Bytes | Dummy Clock Cycles | Data Bytes | DCLK fMAX (MHz) |
---|---|---|---|---|---|
Read status | 05h | 0 | 0 | 1 to infinite 8 | 100 |
Read bytes | 03h | 3 | 0 | 1 to infinite8 | 50 |
Read device identification | 9Fh | 0 | 16 | 1 | 100 |
Read silicon identification | ABh | 0 | 24 | 1 | 100 |
Fast read | 0Bh | 3 | 8 | 1 to infinite8 | 100 |
Extended dual input fast read | BBh | 3 | 4 | 1 to infinite8 | 100 |
Extended quad input fast read 9 | EBh | 3 | 6 | 1 to infinite8 | 100 |
Write enable | 06h | 0 | 0 | 0 | 100 |
Write disable | 04h | 0 | 0 | 0 | 100 |
Write status | 01h | 0 | 0 | 1 | 100 |
Write bytes | 02h | 3 | 0 | 1 to 256 10 | 100 |
Quad input fast write bytes9 | 32h | 3 | 0 | 1 to 25610 | 100 |
Erase bulk | C7h | 0 | 0 | 0 | 100 |
Erase sector | D8h | 3 | 0 | 0 | 100 |
Erase subsector | 20h | 3 | 0 | 0 | 100 |
Read SFDP register9 | 5Ah | 3 | 8 | 1 to 256 | 100 |
Section Content
Read Bytes Operation (03h)
Fast Read Operation (0Bh)
Extended Dual Input Fast Read Operation (BBh)
Extended Quad Input Fast Read Operation (EBh)
Read Device Identification Operation (9Fh)
Read Silicon Identification Operation (ABh)
Write Enable Operation (06h)
Write Disable Operation (04h)
Write Bytes Operation (02h)
Quad Input Fast Write Bytes Operation (32h)
Erase Bulk Operation (C7h)
Erase Sector Operation (D8h)
Erase Subsector Operation (20h)
Read SFDP Register Operation (5Ah)
7 List MSB first and LSB last.
8 The status register or data is read out at least once and is continuously read out until the nCS pin is driven high.
9 This operation is not applicable for EPCQ4A.
10 A write bytes operation requires at least one data byte. If more than 256 bytes are sent to the device, only the last 256 bytes are written to the memory.