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1.1. Supported Devices
1.2. Features
1.3. Operating Conditions
1.4. Pin Information
1.5. Device Package and Ordering Code
1.6. Memory Array Organization
1.7. Memory Operations
1.8. Status Register
1.9. Summary of Operation Codes
1.10. Power Mode
1.11. Timing Information
1.12. Programming and Configuration File Support
1.13. Appendix: SFDP Register Definitions
1.14. Document Revision History for the EPCQ-A Serial Configuration Device Datasheet
1.9.1. Read Bytes Operation (03h)
1.9.2. Fast Read Operation (0Bh)
1.9.3. Extended Dual Input Fast Read Operation (BBh)
1.9.4. Extended Quad Input Fast Read Operation (EBh)
1.9.5. Read Device Identification Operation (9Fh)
1.9.6. Read Silicon Identification Operation (ABh)
1.9.7. Write Enable Operation (06h)
1.9.8. Write Disable Operation (04h)
1.9.9. Write Bytes Operation (02h)
1.9.10. Quad Input Fast Write Bytes Operation (32h)
1.9.11. Erase Bulk Operation (C7h)
1.9.12. Erase Sector Operation (D8h)
1.9.13. Erase Subsector Operation (20h)
1.9.14. Read SFDP Register Operation (5Ah)
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1.9.10. Quad Input Fast Write Bytes Operation (32h)
This operation is similar to the write bytes operation except that the data are shifted in on the DATA0, DATA1, DATA2, and DATA3 pins.
Figure 15. Quad Input Fast Write Bytes Operation Timing Diagram