2024.04.01 |
Made the following changes:
- Updated several sections with screen capture images for the Agilex™ 5 FPGA GTS Ethernet Intel FPGA Hard IP support.
- Updated several topics in the Functional Description section with additional details about the Ethernet Toolkit.
- Updated IP Configuration and Other Information with a new table and information about the GTS Ethernet Intel FPGA Hard IP.
- Added new section Example Link Bring Up Using GTS Ethernet Hard IP about GTS Ethernet Intel FPGA Hard IP bring up details.
- Added new section Ethernet Toolkit GTS Ethernet Hard IP Support about GTS Ethernet Intel FPGA Hard IP support details.
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2023.11.20 |
Made the following changes:
- Updated several screen capture images with the latest Ethernet Toolkit GUI updates.
- Added a new section Resets about asserting and de-asserting resets for the Ethernet IP using the Ethernet Toolkit.
- Added information about LL-FEC and KR-FEC in the RS-FEC section.
- Updated the steps for Link Analysis in the Link Bring Up section.
- Updated AN and LT feature settings and availability in AN and LT Status section.
- Added mode to Disable continuous mode of packet transmission in Packet Generator for F-Tile Ethernet IP section.
- Added new section Ethernet Toolkit Multirate Support about Ethernet Multirate Intel FPGA IP support details.
- Added new section Ethernet Toolkit Subsystem Support about Ethernet Subsystem Intel FPGA IP support details.
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2023.05.22 |
In the AN and LT Status section in Chapter 3, added a note at the beginning stating serial loopback is not supported for ANLT with FHT PMA. |
2023.03.27 |
- In the Functional Description chapter, added a section Parameters.
- Replaced the figure Ethernet Toolkit Groups and Tabs for F-Tile Ethernet IPs in the Functional Description chapter.
- In the AN and LT Status section (3.1.4.5), updated the figure IP Configuration and Other Information Tab.
- In the AN and LT Status section (3.1.4.5), updated the figure Status Tab for Ethernet Toolkit and AN/LT Status Sub Tab.
- Under the section Transmitter and Receiver Statistics (3.1.5.2), added a sub-section Effective Bandwidth Calculation.
- Under the section RS-FEC (3.1.5.3), added a sub-section 32-Bit Soft CWBIN Counter Status.
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[unpublished] |
- Updated product family name to " Intel Agilex® 7".
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2023.01.10 |
- In the section Packet Generator for F-tile Ethernet IP (3.1.5.1.2), added a note before the figure Example Design Packet Generator Settings Tab.
- Updated the figure Ethernet Toolkit Groups and Tabs for F-Tile Ethernet IPs (Figure 6 on page 9).
- Updated the section AL and LT Status (3.1.4.5).
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2022.09.20 |
In the section Packet Generator for F-tile Ethernet IP (3.1.5.1.2), made the following changes:
- Changed the "MAC Client Loopback Mode:" to "Packet Client Loopback Mode:" in the first bullet item.
- Updated Figure 18 (Example Design Packet Generator Settings Tab) on the following page.
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2022.03.28 |
Updated the Example of RS-FEC Tab figure. |
2021.10.04 |
- Globally added F-Tile Ethernet Intel® FPGA Hard IP to the list of Ethernet Toolkit supported IP cores.
- Updated existing descriptions if specific for E-Tile Ethernet IP.
- Added new GUI screenshots and descriptions for F-Tile Ethernet IP.
- Clarified the list of features supported for E-Tile Ethernet IP and F-Tile Ethernet IP
- Separated Example Design Packet Generator Settings and Link Bring-Up Guidelines section to the E-, H-, and L-tile, and F-tile subsections.
- Added new topic: Example Link Bring-Up using F-Tile Ethernet Intel® FPGA Hard IP
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2021.04.02 |
Updated Running the Ethernet Toolkit. Described a limitation for design examples with enabled auto-negotiation and link training. |
2020.09.28 |
Initial release. |