AN 744: Scalable Triple Speed Ethernet Reference Design for Arria 10 Devices

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ID 683785
Date 5/13/2016
Public
Document Table of Contents
Document Table of Contents x
1. AN-744: Scalable Triple Speed Ethernet Reference Designs for Arria 10 Devices
1. AN-744: Scalable Triple Speed Ethernet Reference Designs for Arria 10 Devices x
1.1. Block Diagrams 1.2. Design Components 1.3. Design Parameters 1.4. Hardware and Software Requirements 1.5. Using the Reference Design 1.6. Upgrading the Components 1.7. Testbench 1.8. Interface Signals 1.9. Configuration Registers 1.10. Document Revision History
1.7. Testbench x
1.7.1. Testbench Files 1.7.2. Simulating the Testbench 1.7.3. Test Case: Design With the IEEE 1588v2 Feature 1.7.4. Test Case: Design Without the IEEE 1588v2 Feature
1.8. Interface Signals x
1.8.1. Packet Classifier Interface Signals 1.8.2. ToD Interface Signals
1.9. Configuration Registers x
1.9.1. ToD Registers 1.9.2. Packet Generator Registers 1.9.3. Traffic Monitor Registers
1. AN-744: Scalable Triple Speed Ethernet Reference Designs for Arria 10 Devices

1.7.2. Simulating the Testbench

The simulation script uses QUARTUS_ROOTDIR environment variable to access Altera simulation model libraries. You have to set the QUARTUS_ROOTDIRto point to the Quartus II installation path after installation. If this environment variable is missing, then you must set the variable manually.

Follow these steps to use the ModelSim simulator to simulate the testbench designs:

  1. Ensure that the QUARTUS_ROOTDIR environment variable is pointing to the Quartus II installation path. If this environment variable is missing, you must set the variable manually.

    The simulation script uses this environment variable to access Altera simulation model libraries.

  2. Change to one of the following directories.
    • <project directory>/altera_eth_tse_wo_1588/testbench/Modelsim/testcase<n> for the design without the IEEE 1588v2 feature.
    • <project directory>/altera_eth_tse_w_1588/testbench/Modelsim/testcase<n> for the design with the IEEE 1588v2 feature.
  3. Launch the Modelsim simulator, and run do tb_run.tcl to set up the required libraries, compile the generated IP functional simulation model, and exercise the simulation model with the provided testbench.
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