Intel® Agilex™ Device Configuration via Protocol (CvP) Implementation User Guide

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ID 683763
Date 9/26/2022
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Document Table of Contents
Document Table of Contents x
1. Overview 2. CvP Description 3. CvP Topologies 4. Design Considerations 5. CvP Driver and Registers 6. Understanding the Design Steps for CvP Initialization using the Supported PCIe Tile in Intel® Agilex™ Devices 7. Intel® Agilex™ Device Configuration via Protocol (CvP) Implementation User Guide Archives 8. Document Revision History for the Intel® Agilex™ Device Configuration via Protocol (CvP) Implementation User Guide
1. Overview x
1.1. Benefits of Using CvP 1.2. CvP System 1.3. CvP Modes
1.3. CvP Modes x
1.3.1. CvP Limitations
1.3.1. CvP Limitations x
1.3.1.1. CvP Error Recovery
2. CvP Description x
2.1. Configuration Images 2.2. CvP Modes 2.3. Compression Features 2.4. Pin Description
2.2. CvP Modes x
2.2.1. CvP Initialization Mode 2.2.2. CvP Update Mode
3. CvP Topologies x
3.1. Single Endpoint 3.2. Multiple Endpoints
4. Design Considerations x
4.1. Designing CvP for an Open System 4.2. Designing CvP for a Closed System
4.1. Designing CvP for an Open System x
4.1.1. FPGA Power Supplies Ramp Time Requirement 4.1.2. PCIe Wake-Up Time Requirement
4.1.2. PCIe Wake-Up Time Requirement x
4.1.2.1. For CvP Initialization Mode 4.1.2.2. For CvP Update Mode
5. CvP Driver and Registers x
5.1. CvP Driver Support 5.2. CvP Driver Flow 5.3. VSEC Registers for CvP
5.3. VSEC Registers for CvP x
5.3.1. Vendor Specific Capability Header Register 5.3.2. Vendor Specific Header Register 5.3.3. Intel® Marker Register 5.3.4. User Configurable Device/Board ID Register 5.3.5. CvP Status Register 5.3.6. CvP Mode Control Register 5.3.7. CvP Data Registers 5.3.8. CvP Programming Control Register 5.3.9. CvP Credit Register
6. Understanding the Design Steps for CvP Initialization using the Supported PCIe Tile in Intel® Agilex™ Devices x
6.1. Implementation of CvP Initialization Mode 6.2. Implementation of CvP Update Mode
6.1. Implementation of CvP Initialization Mode x
6.1.1. Generating the Synthesis HDL files for Intel® FPGA P-Tile Avalon Streaming (Avalon-ST) for PCIe* Express 6.1.2. Setting up the CvP Parameters in Device and Pin Options 6.1.3. Compiling the Design 6.1.4. Converting the SOF File 6.1.5. Bringing up the Hardware
6.1.5. Bringing up the Hardware x
6.1.5.1. Installing the Upstream Open Source CvP Driver in Linux Systems 6.1.5.2. Setting Up the Correct MSEL Switch State 6.1.5.3. Programming CvP Images
6.2. Implementation of CvP Update Mode x
6.2.1. Instantiating the PCIe Hard IP 6.2.2. Setting Up the CvP Parameters 6.2.3. Setting Up the Base Revision 6.2.4. Setting Up and Compile the Updated Revision 6.2.5. Converting the SOF File 6.2.6. Programming the Core RBF file from the Updated Revision via PCIe Link
6.2.3. Setting Up the Base Revision x
6.2.3.1. Creating a Reserved Core Partition 6.2.3.2. Defining a Logic Lock Region 6.2.3.3. Compiling and Exporting the Root Partition
1. Overview
2. CvP Description
3. CvP Topologies
4. Design Considerations
5. CvP Driver and Registers
6. Understanding the Design Steps for CvP Initialization using the Supported PCIe Tile in Intel® Agilex™ Devices
7. Intel® Agilex™ Device Configuration via Protocol (CvP) Implementation User Guide Archives
8. Document Revision History for the Intel® Agilex™ Device Configuration via Protocol (CvP) Implementation User Guide

6.1.5.1. Installing the Upstream Open Source CvP Driver in Linux Systems

The installation of CvP driver only needs to be done once for the same kernel version.

  1. Install these tools to build the kernel if you are using Ubuntu. 
    sudo apt-get install bison
sudo apt-get install libncurses5-dev 
sudo apt-get install libssl-dev
sudo apt-get install libncursesw5-dev
sudo apt-get install -y libelf-dev
sudo apt-get install git
sudo apt-get install flex
sudo apt-get install -y xz-utils
  2. Download the kernel source. Intel recommends you use the default kernel version from altera-opensource in github4. The following command obtains the kernel source code from altera-opensource in github.
    Example Command: 
    git clone https://github.com/altera-opensource/linux-socfpga
  3. Save the kernel code folder to /usr/src.
  4. Checkout the branch using: 
    cd linux-socfpga
git checkout socfpga-v5.15.30-lts
  5. (This step is necessary only if you have downloaded v5.9 or below from kernel.org5.) You must install the following patches.
    1. Download Patch1 and Patch2 and save them into the kernel source folder.
    2. In the kernel source directory (for example: /usr/src/linux-5.9-tt), install the patches using the commands below.
      • Run: 
        patch -p1 < 2-2-fpga-add-FPGA-manager-debugfs.patch
      • Run: 
        patch -p1 < 1-2-fpga-doc-documentation-for-FPGA-debugfs.patch
  6. Build and install the kernel modules.
    1. Go into the kernel source folder. Run: cd /usr/src/linux-socfpga.
    2. Copy the existing config over to a new kernel. Run: cp -v /boot/config-$(uname -r) .config
    3. Enable Altera CvP FPGA Manager as kernel module with the command and steps below.
      • Run: make menuconfig
      • In the GUI, navigate to Device Drivers > FPGA Configuration Framework. Set Altera CvP FPGA Manager and FPGA Manager DebugFS to *. Save the config setting to .config file.
      • You may check the .config file, the 3 line items below should be enabled.
        • CONFIG_FPGA=y
        • CONFIG_FPGA_MGR_DEBUG_FS=y
        • CONFIG_FPGA_MGR_ALTERA_CVP=y
    4. Compile the kernel. Run: Make -j 12.
    5. Install the kernel modules.
      • Run: export INSTALL_MOD_PATH=/usr/src/linux-socfpga
      • Run: MODPATH="INSTALL_MOD_PATH=/usr/src/linux-socfpga"
      • Run: ARGS="$MODPATH"
      • Run: make $ARGS modules
      • Run: sudo make modules_install. Check the module version in the last line printed in the Console window. The name might be different based on Kernel build version and .config file.
      • Run "sudo make install". Ensure the Linux image and initrd image are created according to the module version.
    6. (This step is necessary only if you are using Ubuntu.) Modify the Grand Unified Bootloader (Grub) Boot Loader settings. This step is mandatory for first-time kernel installations for Linux to boot up with the appropriate kernel version.
      1. Identify the kernel module version to point to.
        1. Run: grub-mkconfig
        2. Run: cat /boot/grub/grub.cfg
        3. Search for submenu and menuentry to identify the Linux image and initrd image created during kernel installation. In the example shown below, the submenu 'Advanced options for Ubuntu' and menuentry 'Ubuntu, with Linux 5.15.30+' indicate that the kernel version to point to is Advanced options for Ubuntu>Ubuntu, with Linux 5.15.30+
      2. Backup the Grub file in case reverting is needed.
        • Run: sudo cp /etc/default/grub /etc/default/grub.bak
      3. View the Grub file.
        • Run: cat /etc/default/grub
      4. Update the Grub file.
        1. Run: gedit/etc/default/grub
        2. Change the GRUB_DEFAULT to point to the desired kernel module version as previously identified.
          • Example: GRUB_DEFAULT = "Advanced options for Ubuntu>Ubuntu, with Linux 5.15.30+"
        3. Save the changes
      5. Ensure the Grub changes take effect.
        • Run: sudo update-grub
    7. Reboot the system and ensure the system reboots to the installed kernel:
      • Run : reboot. Allow the PC to reboot successfully.
      • Run : uname -mrs. The system should be rebooted with the installed kernel version as shown below.
4 The socfpga-v5.15.30-lts and socfpga-v5.10.110-lts are the versions tested on Intel hardware as of Intel® Quartus® Prime version 22.2.
5 Intel recommends you use the default kernel version from altera-opensource in github.
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