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1.1. JESD204B Intel FPGA IP v20.2.1
1.2. JESD204B Intel FPGA IP v19.2.0
1.3. JESD204B Intel FPGA IP v19.2.0
1.4. JESD204B Intel FPGA IP v19.1
1.5. JESD204B Intel FPGA IP v18.1
1.6. JESD204B Intel FPGA IP v18.0
1.7. JESD204B IP Core v17.1
1.8. JESD204B IP Core v17.0
1.9. JESD204B IP Core v16.1
1.10. JESD204B IP Core v16.0
1.11. JESD204B IP Core v15.1
1.12. JESD204B IP Core v15.0
1.13. JESD204B IP Core v14.1
1.14. JESD204B Intel® FPGA IP User Guide Archives
1.15. JESD204B Stratix® 10 FPGA IP Design Example User Guide Archives
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1.6. JESD204B Intel FPGA IP v18.0
| Description | Impact |
|---|---|
| Added support for Cyclone® 10 GX FPGA devices and new design example tab for Cyclone® 10 GX in the parameter editor. | Cyclone® 10 GX devices are now supported in the 18.0 Quartus® Prime Pro Edition software. |
| Added back the Target Development Kit option for the Stratix® 10 design example. This parameter was not available in the JESD204B Intel FPGA IP version 17.1 Update 1. The target development board for the design example is FPGA development board. |
Stratix® 10 design example is only available in the Quartus® Prime Pro Edition software. |
| Added support for Cadence Xcelium* Parallel simulator. | – |