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1.1. JESD204B Intel FPGA IP v20.2.1
1.2. JESD204B Intel FPGA IP v19.2.0
1.3. JESD204B Intel FPGA IP v19.2.0
1.4. JESD204B Intel FPGA IP v19.1
1.5. JESD204B Intel FPGA IP v18.1
1.6. JESD204B Intel FPGA IP v18.0
1.7. JESD204B IP Core v17.1
1.8. JESD204B IP Core v17.0
1.9. JESD204B IP Core v16.1
1.10. JESD204B IP Core v16.0
1.11. JESD204B IP Core v15.1
1.12. JESD204B IP Core v15.0
1.13. JESD204B IP Core v14.1
1.14. JESD204B Intel® FPGA IP User Guide Archives
1.15. JESD204B Stratix® 10 FPGA IP Design Example User Guide Archives
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1. JESD204B Intel FPGA IP Release Notes
If a release note is not available for a specific IP version, the IP has no changes in that version. For information on IP update releases up to v18.1, refer to the Quartus® Prime Design Suite Update Release Notes.
Intel® FPGA IP versions match the Quartus® Prime Design Suite software versions until v19.1. Starting in Quartus® Prime Design Suite software version 19.2, Intel® FPGA IP has a new versioning scheme.
The Intel® FPGA IP version (X.Y.Z) number can change with each Quartus® Prime software version. A change in:
- X indicates a major revision of the IP. If you update the Quartus® Prime software, you must regenerate the IP.
- Y indicates the IP includes new features. Regenerate your IP to include these new features.
- Z indicates the IP includes minor changes. Regenerate your IP to include these changes.
Section Content
JESD204B Intel FPGA IP v20.2.1
JESD204B Intel FPGA IP v19.2.0
JESD204B Intel FPGA IP v19.2.0
JESD204B Intel FPGA IP v19.1
JESD204B Intel FPGA IP v18.1
JESD204B Intel FPGA IP v18.0
JESD204B IP Core v17.1
JESD204B IP Core v17.0
JESD204B IP Core v16.1
JESD204B IP Core v16.0
JESD204B IP Core v15.1
JESD204B IP Core v15.0
JESD204B IP Core v14.1
JESD204B Intel FPGA IP User Guide Archives
JESD204B Stratix 10 FPGA IP Design Example User Guide Archives
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