PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 7/15/2024
Public
Document Table of Contents

4.2.3.1.1. Clock Frequency Relationships

The following equations describe the relationships between the clock domains available in the PHY Lite for Parallel Interfaces Intel® FPGA IP.

Core Clock Rate = Interface clock frequency / Core clock frequency

VCO frequency Multiplier Factor = VCO clock frequency 7 / Interface clock frequency

7 You can obtain this value from the VCO clock frequency parameter under General Tab in the IP parameter editor.