AN 741: Remote System Upgrade for MAX 10 FPGA Devices over UART with the Nios II Processor

Download PDF
ID 683661
Date 2/21/2017
Public
Document Table of Contents
Document Table of Contents x
1. Remote System Upgrade for MAX 10 FPGA Devices over UART with the Nios II Processor
1. Remote System Upgrade for MAX 10 FPGA Devices over UART with the Nios II Processor x
1.1. Remote System Upgrade with MAX 10 FPGA Overview 1.2. Abbreviations 1.3. Prerequisite 1.4. Requirements 1.5. Reference Design Files 1.6. Reference Design Functional Description 1.7. Reference Design Walkthrough 1.8. Document Revision History
1.6. Reference Design Functional Description x
1.6.1. Reference Design IP Core Components 1.6.2. The Nios II EDS Software Application Design
1.6.1. Reference Design IP Core Components x
1.6.1.1. Nios II Gen2 Processor 1.6.1.2. Altera On-Chip Flash IP Core 1.6.1.3. Altera Dual Configuration IP Core 1.6.1.4. Altera UART IP Core 1.6.1.5. Generic Quad SPI Controller IP Core
1.6.2. The Nios II EDS Software Application Design x
1.6.2.1. Updating Application Images Remotely 1.6.2.2. Triggering Reconfiguration Remotely
1.7. Reference Design Walkthrough x
1.7.1. Generating Programming Files 1.7.2. Programming the QSPI 1.7.3. Programming the FPGA with Initial Image using JTAG 1.7.4. Updating Image and Triggering Reconfiguration using UART
1.7.1. Generating Programming Files x
1.7.1.1. Generating files for QSPI Programming 1.7.1.2. Generating files for Remote System Upgrade
1.7.1.2. Generating files for Remote System Upgrade x
1.7.1.2.1. .pof Generation through Convert Programming Files
1. Remote System Upgrade for MAX 10 FPGA Devices over UART with the Nios II Processor

1.7.1.2.1. .pof Generation through Convert Programming Files

To convert .sof files to .pof files, follow these steps:

  1. On the File menu, click Convert Programming Files.
  2. Under Output programming file, select Programmer Object File (.pof) in the Programming file type list.
  3. In the Mode list, select Internal Configuration.
  4. In the File name box, specify the file name for the programming file you want to create.
  5. To generate a Memory Map File (.map), turn on Create Memory Map File (Auto generate output_file.map). The .map contains the address of the CFM and UFM with the ICB setting that you set through the Option/Boot Info option.
  6. To generate a Raw Programming Data (.rpd), turn on Create config data RPD (Generate output_file_auto.rpd).
    With the help of Memory Map File, you can easily identify the data for each functional block in the .rpd file. You can also extract the flash data for third party programming tools or update the configuration or user data through the Altera On-Chip Flash IP.
  7. The .sof can be added through Input files to convert list and you can add up to two .sof files.
    For remote system upgrade purposes, you can retain the original page 0 data in the .pof, and replace page 1 data with new .sof file. To perform this, you need to add the .pof file in page 0, then add .sof page, then add the new .sof file to page 1.
  8. After all settings are set, click Generate to generate related programming file.
Level Two Title