AN 464: DFT/IDFT Reference Design

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ID 683644
Date 5/30/2018
Public
Document Table of Contents
Document Table of Contents x
About the DFT/IDFT Reference Design Functional Description for the DFT/IDFT Reference Design Getting Started with the DFT/IDFT Reference Design Running the Fixed-Point Model for the DFT/IDFT Reference Design Performance of DFT/IDFT Reference Design Document Revision History for AN 464: DFT/IDFT Reference Design
Functional Description for the DFT/IDFT Reference Design x
Parameters for the DFT/IDFT Reference Design Signals for the DFT/IDFT Reference Design
Getting Started with the DFT/IDFT Reference Design x
System Requirements for the DFT/IDFT Reference Design Installing the DFT/IDFT Reference Design Simulating the DFT/IDFT Reference Design with the Avalon-ST Testbench Simulating the Reference design with the Command Line Regression Test Synthezising the DFT/IDFT Reference Design
Running the Fixed-Point Model for the DFT/IDFT Reference Design x
Fixed-Point Model Parameters
About the DFT/IDFT Reference Design
Functional Description for the DFT/IDFT Reference Design
Getting Started with the DFT/IDFT Reference Design
Running the Fixed-Point Model for the DFT/IDFT Reference Design
Performance of DFT/IDFT Reference Design
Document Revision History for AN 464: DFT/IDFT Reference Design

Synthezising the DFT/IDFT Reference Design

Intel provides an example project in the directory /example_quartus_project.
  1. Open file /src/new/ltefft.top.vhd and edit the following top-level parameters as desired. 
    entity ltefft_top is
  generic (
    idft_mode                    : integer  := 0;
    datawidth                    : positive := 18;
    twidwidth                    : positive := 16;
    iqinpercc                    : positive := 3; -- input IQ samples per CC
    use_output_buffer            : boolean  := false;  --true;  --false;
    BUFFER_DEPTH                 : integer  := 1200;  --8;     --  4    8    16   32  64   128  256  512  1024  2048
    BUFFER_DEPTH_N               : integer  := 11;  --3;      -- 2    3    4    5    6    7    8    9   10    11
    use_90_optimised_twiddle_rom : integer  := 1  -- must always be = 1
    );
    Note: These default settings have no effect on the simulation runs.
  2. Copy all .hex files from the /rom_data/bits_<twidwidth>/ drectory to the /example_quartus_proj/hex_rom directory.
    Skip this step if you are not changingthe default parameters.
  3. Copy the file butterfly_coef_pkg.vhd from the dft/rom_data/bfly_coef_pkgs/bits_<twidwidth> directory.
    Skip this step if you are not changingthe default parameters.
  4. Open the Intel® Quartus® Prime software.
  5. Open the project in the /example_quartus_proj/ directory.
  6. Selecta a device.
  7. Compile the design.
Level Two Title