About the DFT/IDFT Reference Design
The reference design performs the functions for either a DFT in the uplink or an IDFT in the downlink of a typical 3G long-term evolution (LTE) physical interface (PHY) implementation
The design inputs the transform length coincident with the first validated data sample. The design can configure the transform length at runtime (on a block-by-block basis) to any one of the 53 sizes specified by 3GPP TS 36.101 version 8.29.0 Release 8..
The reference design uses Avalon® Streaming (Avalon-ST) interfaces for the inputs and the outputs. The input samples are in an integer format; the output samples are in block floating point format.
Parameters specify the transform mode (DFT or IDFT) and internal bit widths for the datapath and the twiddle value precision.
The reference design targets at Intel® Stratix® 10 devices and meets typical latency requirements while minimizing power.