Quartus® Prime Pro Edition User Guide: Design Optimization

ID 683641
Date 7/08/2024
Public
Document Table of Contents

1.2. Initial Compiler Settings

Your design compilation results can vary significantly, depending on the initial assignments and settings that you choose prior to compiling. The Quartus® Prime software initial settings for compilation are set to provide a balanced trade-off between the time required for compilation, the device resource utilization, and the design timing performance.

You can easily adjust this trade-off to focus the Compiler's effort more on shortening the total compile time, reducing device resource utilization, or maximizing timing performance.

The initial FPGA device selection and Compiler settings have a very significant impact on design performance and optimization. You should also consider the following guidelines for specifying initial settings before compiling your design for the first time in the Quartus® Prime software.

Figure 2. Compiler Optimization Mode SettingsClick Assignments > Settings > Compiler Settings > Optimization Mode to adjust the Compiler's effort on Performance, Area, Routability, or Compile Time.