Quartus® Prime Pro Edition User Guide: Design Optimization

ID 683641
Date 7/08/2024
Public
Document Table of Contents

6.4. Defining Virtual Pins

A virtual pin is an I/O element that the Compiler temporarily maps to a logic element, rather than to a pin. The Compiler implements these virtual pins as LUTs.

By making assignments to virtual pins, you can ensure that the Fitter places those pins in the same device region as the corresponding internal nodes in the top-level module. You can apply the Virtual Pin option to successfully compile a Logic Lock module that has more pins than the target device. The Virtual Pin option can enable timing analysis of a design module that more closely matches the performance of the module after you integrate it into the top-level design.

You can create and assign virtual pins to an I/O element using the Virtual Pin logic option in the Assignment Editor (Assignments > Assignment Editor).

Figure 127.  Virtual Pin Logic Option in the Assignment Editor


When you apply the Virtual Pin assignment to an input pin, the pin no longer appears as an FPGA pin. Rather, the Compiler fixes the virtual pin to GND in the design. The virtual pin is not a floating node.

Use virtual pins only for I/O elements in lower-level design entities that become nodes after you import the entity to the top-level design; for example, when compiling a partial design. In the top-level design, you connect these virtual pins to an internal node of another module

Note: You must assign the Virtual Pin logic option to an input or output pin. If you assign this option to a bidirectional pin, tri-state pin, or registered I/O element, synthesis ignores the assignment. If you assign this option to a tri-state pin, the Fitter inserts an I/O buffer to account for the tri-state logic; therefore, the pin cannot be a virtual pin. You can use multiplexer logic instead of a tri-state pin if you want to continue to use the assigned pin as a virtual pin. Do not use tri-state logic except for signals that connect directly to device I/O pins.

To display all assigned virtual pins in the design with the Node Finder, you can set Filter Type to Pins: Virtual. To access the Node Finder from the Assignment Editor, double-click the To field; when the arrow appears on the right side of the field, click and select Node Finder.