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3.3.1. General-Purpose Register File
3.3.2. Arithmetic Logic Unit
3.3.3. Multipy and Divide Units
3.3.4. Custom Instruction
3.3.5. Reset and Debug Signals
3.3.6. Control and Status Registers
3.3.7. Exception Controller
3.3.8. Interrupt Controller
3.3.9. Memory and I/O Organization
3.3.10. RISC-V based Debug Module
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2.5.1. Instruction Set Reference
The Nios® V/m processor is based on the RV32IA specification, and there are 6 types of instruction formats. They are R-type, I-type, S-type, B-type, U-type, and J-type.
Bit Field (R-type) | |||||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
funct7 | rs2 | rs1 | |||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
rs1 | funct3 | rd | opcode |
Bit Field (I-type) | |||||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
imm[11:0] | rs1 | ||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
rs1 | funct3 | rd | opcode |
Bit Field (S-type) | |||||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
imm[11:5] | rs2 | rs1 | |||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
rs1 | funct3 | imm[4:0] | opcode |
Bit Field (B-type) | |||||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
imm[12] | imm[10:5] | rs2 | rs1 | ||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
rs1 | funct3 | imm[4:1] | imm[11] | opcode |
Bit Field (U-type) | |||||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
imm[31:16] | |||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
imm[15:12] | rd | opcode |
Bit Field (J-type) | |||||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
imm[20] | imm[10:1] | imm[11] | imm[19:16] | ||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
imm[15:12] | rd | opcode |
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