Nios® V Processor Reference Manual

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ID 683632
Date 3/28/2022
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Document Table of Contents
Document Table of Contents x
1. About this Document 2. Nios® V/m Processor 3. Document Revision History for the Nios® V Processor Reference Manual
1. About this Document x
1.1. Overview
2. Nios® V/m Processor x
2.1. Processor Performance Benchmarks 2.2. Processor Pipeline 2.3. Processor Architecture 2.4. Programming Model 2.5. Core Implementation
2.3. Processor Architecture x
2.3.1. General Purpose Register File 2.3.2. Arithmetic Logic Unit 2.3.3. Control and Status Registers 2.3.4. Exception Controller 2.3.5. Interrupt Controller 2.3.6. Memory and I/O Organization 2.3.7. RISC-V based Debug Module
2.3.5. Interrupt Controller x
2.3.5.1. Timer and Software Interrupt Module
2.3.6. Memory and I/O Organization x
2.3.6.1. Instruction and Data Buses
2.3.6.1. Instruction and Data Buses x
2.3.6.1.1. Instruction Manager Port 2.3.6.1.2. Data Manager Port 2.3.6.1.3. Address Map
2.3.7. RISC-V based Debug Module x
2.3.7.1. Debug Mode 2.3.7.2. Halt from Debug Module 2.3.7.3. Debug Implementation 2.3.7.4. Abstract Commands in Debug Mode 2.3.7.5. Hardware/Software Interface
2.4. Programming Model x
2.4.1. Privilege Levels 2.4.2. Control and Status Registers (CSR) Mapping
2.4.1. Privilege Levels x
2.4.1.1. Machine Mode (M-mode) 2.4.1.2. Debug Mode (D-mode)
2.4.2. Control and Status Registers (CSR) Mapping x
2.4.2.1. Control and Status Register Field
2.5. Core Implementation x
2.5.1. Instruction Set Reference
1. About this Document
2. Nios® V/m Processor
3. Document Revision History for the Nios® V Processor Reference Manual

2.5.1. Instruction Set Reference

The Nios® V/m processor is based on the RV32IA specification, and there are 6 types of instruction formats. They are R-type, I-type, S-type, B-type, U-type, and J-type.

Table 28.  Instruction Formats (R-type)
Bit Field (R-type)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
funct7 rs2 rs1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
rs1 funct3 rd opcode
Table 29.  Instruction Formats (I-type)
Bit Field (I-type)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
imm[11:0] rs1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
rs1 funct3 rd opcode
Table 30.  Instruction Formats (S-type)
Bit Field (S-type)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
imm[11:5] rs2 rs1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
rs1 funct3 imm[4:0] opcode
Table 31.  Instruction Formats (B-type)
Bit Field (B-type)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
imm[12] imm[10:5] rs2 rs1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
rs1 funct3 imm[4:1] imm[11] opcode
Table 32.   Instruction Formats (U-type)
Bit Field (U-type)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
imm[31:16]
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
imm[15:12] rd opcode
Table 33.  Instruction Formats (J-type)
Bit Field (J-type)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
imm[20] imm[10:1] imm[11] imm[19:16]
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
imm[15:12] rd opcode
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