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1. Intel® Stratix® 10 ADC Overview
2. Intel® Stratix® 10 ADC Architecture and Features
3. Intel® Stratix® 10 ADC Design Considerations
4. Intel® Stratix® 10 ADC Implementation Guides
5. Intel® Stratix® 10 ADC IP Core References
6. Intel® Stratix® 10 Analog to Digital Converter User Guide Archives
7. Document Revision History for the Intel® Stratix® 10 Analog to Digital Converter User Guide
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1.1. Release Information for Voltage Sensor and Temperature Sensor Intel® FPGA IP Cores
Intel® FPGA IP versions match the Intel® Quartus® Prime Design Suite software versions until v19.1. Starting in Intel® Quartus® Prime Design Suite software version 19.2, Intel® FPGA IP has a new versioning scheme.
The Intel® FPGA IP version (X.Y.Z) number can change with each Intel® Quartus® Prime software version. A change in:
- X indicates a major revision of the IP. If you update the Intel® Quartus® Prime software, you must regenerate the IP.
- Y indicates the IP includes new features. Regenerate your IP to include these new features.
- Z indicates the IP includes minor changes. Regenerate your IP to include these changes.
Item | Description |
---|---|
IP Version | 19.1.1 |
Intel® Quartus® Prime Version | 20.4 |
Release Date | 2020.12.14 |
Item | Description |
---|---|
IP Version | 19.1.1 |
Intel® Quartus® Prime Version | 20.4 |
Release Date | 2020.12.14 |