F-Tile Interlaken Intel® FPGA IP Release Notes

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ID 683610
Date 7/08/2024
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Document Table of Contents x
1. F-Tile Interlaken Intel® FPGA IP Release Notes
1. F-Tile Interlaken Intel® FPGA IP Release Notes x
1.1. F-Tile Interlaken Intel® FPGA IP v8.1.0 1.2. F-Tile Interlaken Intel® FPGA IP v8.0.0 1.3. F-Tile Interlaken Intel® FPGA IP v7.1.0 1.4. F-Tile Interlaken Intel® FPGA IP v7.0.0 1.5. F-Tile Interlaken Intel® FPGA IP v6.1.0 1.6. F-Tile Interlaken Intel® FPGA IP v6.0.0 1.7. F-Tile Interlaken Intel® FPGA IP v5.0.0 1.8. F-Tile Interlaken Intel® FPGA IP v4.1.0 1.9. F-Tile Interlaken Intel® FPGA IP v4.0.0 1.10. F-Tile Interlaken Intel® FPGA IP v3.1.0 1.11. F-Tile Interlaken Intel® FPGA IP v3.0.0 1.12. F-Tile Interlaken Intel® FPGA IP v2.0.0 1.13. F-Tile Interlaken Intel® FPGA IP User Guide Archives 1.14. F-Tile Interlaken Intel® FPGA IP Design Example User Guide Archives
1. F-Tile Interlaken Intel® FPGA IP Release Notes

1.1. F-Tile Interlaken Intel® FPGA IP v8.1.0

Table 1.  v8.1.0 2024.07.08
Quartus® Prime Pro Edition Version Description Impact
24.2 Updated FIFO IP component —
Fixed the MLAB synthesized away warnings —
Updated Xcelium simulation script to comply with new flow —
Updated the development kit OPN to C0 OPN (C0 OPN having the E200G for support of 500G and 600G) —
Level Two Title