Intel® Arria® 10 Native Fixed Point DSP IP Core User Guide

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ID 683583
Date 3/13/2017
Public
Document Table of Contents
Document Table of Contents x
1. Intel® Arria® Native Fixed Point DSP IP Core User Guide 2. Getting Started 3. Functional Description A. Arria 10 Native Fixed Point DSP IP Core User Guide Document Archives B. Additional Information
1. Intel® Arria® Native Fixed Point DSP IP Core User Guide x
1.1. Arria 10 Native Fixed Point DSP IP Core Features
2. Getting Started x
2.1. Arria 10 Native Fixed Point DSP IP Core Parameter Settings
2.1. Arria 10 Native Fixed Point DSP IP Core Parameter Settings x
2.1.1. Operation Mode Tab 2.1.2. Pre-adder Tab 2.1.3. Internal Coefficient Tab 2.1.4. Accumulator/Output Cascade Tab 2.1.5. Pipelining Tab 2.1.6. Maximum Input Data Width Per Operation Mode
3. Functional Description x
3.1. Operational Modes 3.2. Optional Modules 3.3. Clocking Scheme 3.4. Arria 10 Native Fixed Point DSP IP Core Signals
3.1. Operational Modes x
3.1.1. The 18 × 18 Full Mode 3.1.2. The 18 × 18 Sum of 2 Mode 3.1.3. The 18 × 18 Plus 36 Mode 3.1.4. The 18 × 18 Systolic Mode 3.1.5. The 27 × 27 Mode
3.1.3. The 18 × 18 Plus 36 Mode x
3.1.3.1. Using Less Than 36-bit Operand In 18 × 18 Plus 36 Mode
3.2. Optional Modules x
3.2.1. Input Cascade 3.2.2. Pre-adder 3.2.3. Internal Coefficient 3.2.4. Accumulator and Output Cascade 3.2.5. Pipeline Register
B. Additional Information x
B.1. Arria 10 Native Fixed Point DSP IP Core Document Revision History
1. Intel® Arria® Native Fixed Point DSP IP Core User Guide
2. Getting Started
3. Functional Description
A. Arria 10 Native Fixed Point DSP IP Core User Guide Document Archives
B. Additional Information

3.2.4. Accumulator and Output Cascade

The accumulator module can be enabled to perform the following operations:
  • Addition or subtraction operation
  • Biased rounding operation using a constant value of 2N
  • Dual channel accumulation

To dynamically perform addition or subtraction operation of the accumulator, control the negate input signal.

For biased rounding operation, you can specify and load a preset constant of 2N before the accumulator module is enabled by specifying an integer to the parameter N value of preset constant. The integer N must be less than 64. You can dynamically enable or disable the use of the preset constant by controlling the loadconst signal. You can use this operation as an active muxing of the round value into the accumulator feedback path. The loadconst and the accumulate signals usage is mutually exclusive.

You can enable the double accumulator register using the parameter Enable double accumulator to perform double accumulation.

The accumulator module can support chaining of multiple DSP blocks for addition or subtraction operation by enabling chainin input port and chainout output port. In 18 × 18 systolic mode, only 44-bit of the chainin input bus and chainout output bus will be used. However, all 64-bit chainin input bus must be connected to the chainout output bus from the preceding DSP block.

Level Two Title