Intel® FPGA Programmable Acceleration Card D5005 Data Sheet

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ID 683568
Date 11/04/2019
Public
Document Table of Contents
Document Table of Contents x
1. Introduction 2. Overview 3. Board Management Controller 4. FPGA Interface Manager 5. System Compatibility 6. Power Requirements 7. Mechanical Information 8. Thermal and Airflow Requirements A. Safety and Regulatory Information B. Revision History
2. Overview x
2.1. Intel® FPGA PAC D5005 Specifications 2.2. Intel® FPGA PAC Components
2.2. Intel® FPGA PAC Components x
2.2.1. Intel® Stratix® 10 FPGA 2.2.2. Power 2.2.3. PCIe* Interface 2.2.4. DDR4 SDRAM 2.2.5. Network Interface 2.2.6. Field Replaceable Unit Identification EEPROM 2.2.7. MAC Address EEPROM 2.2.8. Flash Memory 2.2.9. Control and Support
3. Board Management Controller x
3.1. Health Monitoring Features 3.2. Supported PLDM/MCTP Commands
7. Mechanical Information x
7.1. Ports and LEDs
8. Thermal and Airflow Requirements x
8.1. Thermal Cooling Requirements 8.2. Airflow Requirements
A. Safety and Regulatory Information x
A.1. Regulatory Compliance
1. Introduction
2. Overview
3. Board Management Controller
4. FPGA Interface Manager
5. System Compatibility
6. Power Requirements
7. Mechanical Information
8. Thermal and Airflow Requirements
A. Safety and Regulatory Information
B. Revision History

3.1. Health Monitoring Features

The Intel® FPGA PAC incorporates sensors that allow the host server to read telemetry data from the board such as voltage, current, power, temperatures and network status information from various components on the board. This telemetry data is available via the PLDM interface or over PCIe using the fpgainfo tool available with the Intel Acceleration Stack. These sensors reside on the I2C busses that are connected to the Board Management Controller (BMC) and FPGA device.

Note: The FPGA VCC Core power has a dedicated AVSbus that is separate from any of the I2C busses.
Note: The QSFP Network ports reside behind the network port controller. See the controller datasheet (Texas Instruments FPC202RHUR) for more information.
Note: The FPGA design can read these sensors directly or through the Board Management Controller using standard PLDM commands and report their status to the host server.
Table 6.  Thresholds with Sensor Information
Name Specification Values Lower Non-Recoverable (LNR) Lower Critical (LC) Lower Non-Critical (LNC) Upper Non-Critical (UNC) Upper Critical (UC) Upper Non-Recoverable (UNR)
Board Power Rail
12 V Aux Hot Swap Current 12.5 A max 12.5 A 13.2 A 14 A
12 V Aux Hot Swap Voltage 12 V +/-10% 9.6 V 10.2 V 10.5 V 13.2 V 13.5 V 14 V
12 V Aux Hot Swap Temperature 0 °C to 125 °C 118 °C 120 °C 125 °C
12 V PCIe Hot Swap Current 5.5 A max 5.5 A 5.8 A 6 A
12 V PCIe Hot Swap Voltage 12 V +/-10% 9.6 V 10.2 V 10.5 V 13.2 V 13.5 V 14 V
12 V PCIe Hot Swap Temperature 0 °C to 125 °C 118 °C 120 °C 125 °C
3.3 V Regulator Current 20 A max 20 A 22 A 23 A
3.3 V Regulator Voltage 3.3 V +/-5% 3.4 V 3.6 V 3.9 V
3.3 V Regulator Temperature 125 °C max 118 °C 120 °C 125 °C
1.8 V Regulator Current 20 A max 20 A 22 A 23 A
1.8 V Regulator Voltage 1.8 V +/-5% 1.55 V 1.6 V 1.7 V 1.9 V 1.98 V 2.04 V
1.8 V Regulator Temperature 125 °C max 118 °C 120 °C 125 °C
VCCERAM Regulator Current 20 A max 20 A 22 A 23 A
VCCERAM Regulator Voltage 0.9 V +/-30mV 0.7 V 0.8 V 0.85 V 0.95 V 0.99 V 1.08 V
VCCERAM Regulator Temperature 125 °C max 118 °C 120 °C 125 °C
VCCR_GXB Regulator Current 20 A max 20 A 22 A 23 A
VCCR_GXB Regulator Voltage 1.12 V +/-3% 1 V 1.05 V 1.08 V 1.15 V 1.2 V 1.35 V
VCCR_GXB Regulator Temperature 125 °C max 118 °C 120 °C 125 °C
VCCT_GXB Regulator Current 20 A max 20 A 22 A 23 A
VCCT_GXB Regulator Voltage 1.12 V +/-2% 1 V 1.05 V 1.08 V 1.15 V 1.2 V 1.35 V
VCCT_GXB Regulator Temperature 125 °C max 118 °C 120 C 125 C
FPGA Core Regulator Voltage 0.80 V–0.94 V +/-30 mV 0.99 V 1.05 V 1.15 V
FPGA Core Regulator Current 150 A max 150 A 160 A 170 A
FPGA Core Regulator Temperature -40 °C to 125 °C 115 °C 120 °C 125 °C
FPGA Core Die Temperature 0 °C to 100 °C 90 °C 95 °C 100 °C
FPGA Transceiver Die Temperature 0 °C to 100 °C     90 °C 95 °C 100 °C
QSFP Port 0 Temperature 0 °C to 70 °C max 70 °C 80 °C 90 °C
QSFP Port 1 Temperature 0 °C to 70 °C max 70 °C 80 °C 90 °C
DDR4 Module 0 Temperature 0 °C to 95 °C 85 °C 90 °C 95 °C
DDR4 Module 1 Temperature 0 °C to 95 °C 85 °C 90 °C 95 °C
DDR4 Module 2 Temperature 0 °C to 95 °C 85 °C 90 °C 95 °C
DDR4 Module 3 Temperature 0 °C to 95 °C 85 °C 90 °C 95 °C
Level Two Title