AN 820: Hierarchical Partial Reconfiguration over PCI Express* Reference Design for Intel® Stratix® 10 Devices

Download PDF
ID 683531
Date 9/24/2018
Public
Document Table of Contents
Document Table of Contents x
1. Hierarchical Partial Reconfiguration over PCI Express* Reference Design for Intel® Stratix® 10 Devices A. Reference Design Files
1. Hierarchical Partial Reconfiguration over PCI Express* Reference Design for Intel® Stratix® 10 Devices x
1.1. Reference Design Overview 1.2. Getting Started 1.3. Reference Design Components 1.4. Compiling the Reference Design 1.5. Testing the Reference Design 1.6. Extending the Reference Design with Custom Persona 1.7. Document Revision History for AN 820: Hierarchical Partial Reconfiguration over PCI Express* Reference Design for Intel® Stratix® 10 Devices
1.1. Reference Design Overview x
1.1.1. Clocking Scheme 1.1.2. Memory Address Mapping 1.1.3. Floorplanning
1.2. Getting Started x
1.2.1. Hardware and Software Requirements 1.2.2. Installing the Intel® Stratix® 10 GX FPGA Development Kit 1.2.3. Installing the Linux Driver Uninstalling the Linux Driver 1.2.4. Bringing Up the Reference Design
1.3. Reference Design Components x
1.3.1. BSP Top
1.3.1. BSP Top x
1.3.1.1. PCI Express* IP core 1.3.1.2. Intel® Stratix® 10 DDR4 External Memory Interfaces IP Core 1.3.1.3. Design Top
1.3.1.3. Design Top x
1.3.1.3.1. Global Reset Logic 1.3.1.3.2. PR Region Wrapper 1.3.1.3.3. Intel® Stratix® 10 Partial Reconfiguration Region Controller IP Core 1.3.1.3.4. Intel® Stratix® 10 Partial Reconfiguration Controller IP Core 1.3.1.3.5. Partial Reconfiguration Logic
1.5. Testing the Reference Design x
1.5.1. program_fpga_jtag 1.5.2. fpga-configure example_host_uio
example_host_uio x
1.5.3.1. Compiling the Example Applications 1.5.3.2. Programming the Design Using Example Applications
1. Hierarchical Partial Reconfiguration over PCI Express* Reference Design for Intel® Stratix® 10 Devices
A. Reference Design Files

1.2.3. Installing the Linux Driver

The reference design includes the complete source code for the open source Linux driver, developed and tested for this reference design.
Important: This Linux driver does not monitor the backpressure signal from the Intel® Stratix® 10 Partial Reconfiguration IP core, but instead uses a delay between 4KB blocks. This strategy may not work on your design. Adapt this driver to your design’s strategy to handle backpressure from the Intel® Stratix® 10 Partial Reconfiguration IP core.
The Linux driver for this design requires that the debugfs to be mounted. To verify if the debugfs is mounted, run the following command: 
mount | grep ^debugfs
For more information on the debugfs file system, please refer to the CentOS documentation.
Important: CentOS 7 is the only supported OS by this driver.
You must install all the prerequisite packages before installing this driver. To install the per-requisite packages, run the following commands: 
yum groupinstall “Development Tools”
yum install ncurses-devel
yum install qt-devel
yum install hmaccalc zlib-devel binutils-devel elfutils-libelf-devel
To install the driver, follow these steps:
  1. Ensure the driver source code is copied to your machine. The source code can be found at the following location:

    https://github.com/intel/fpga-partial-reconfig/tree/master/software/drivers

  2. To compile all the necessary driver modules, run the following command:
    make DEVICE=s10
    Note: To enable verbose messaging, use the option VERBOSE=true with the make command.
    Ensure that the following two kernel object files are present in the driver source directory after running this command:
    • fpga-mgr-mod.ko
    • fpga-pcie-mod.ko
    Note: By default, the driver introduces a 5 ms delay with each 4KB chunk of the PR bitstream sent. To change this default value, run the following command: 
    make DEVICE=s10 WAIT_TIME=x
    where x is the delay in milliseconds.
  3. To copy the modules to the right location and update the module dependency database, run the following command:
    sudo make install
  4. To deploy an instance of the driver for each Intel® FPGA device, run the following command:
    sudo /sbin/modprobe fpga-pcie-mod
  5. To verify successful installation of the driver, run the following command:
    lspci –vvvd1172:
    Upon successful installation, the resulting output displays the following at the end:
    Kernel driver in use: fpga-pcie
Kernel modules: fpga_pcie_mod
    Note: The above command only works when the design has been loaded onto the board and the computer has been power-cycled.

Uninstalling the Linux Driver

If you wish to uninstall the Linux driver, follow these steps:
  • Run the following command:
    sudo modprobe -r fpga-pcie-mod
    This command stops the driver from executing and deactivates it. However, at this point, rebooting your machine continues to reload the driver.
  • To permanently delete the driver, run the following commands:
    
cd /lib/modules/$(uname -r)/extra
rm -rf fpga-pcie-mod.ko
Related Information
Level Two Title