Generic Flash Programmer User Guide: Intel® Quartus® Prime Pro Edition

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ID 683495
Date 3/28/2022
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Document Table of Contents
Document Table of Contents x
1. Generic Flash Programmer User Guide Intel® Quartus® Prime Pro Edition
1. Generic Flash Programmer User Guide Intel® Quartus® Prime Pro Edition x
1.1. Supported Devices and Configuration Methods 1.2. Quad SPI Flash Byte-Addressing 1.3. Generic Flash Programmer Operation 1.4. Generic Flash Programmer Flow Templates ( Intel® Stratix® 10 devices) 1.5. Generic Flash Programmer Flow Templates ( Intel® Arria® 10 and Intel® Cyclone® 10 GX) 1.6. Generic Flash Programmer Settings Reference 1.7. Generic Flash Programmer User Guide Revision History 1.8. Generic Flash Programmer Document Archive
1.3. Generic Flash Programmer Operation x
1.3.1. Generic Flash Programming (Programming File Generator) 1.3.2. Generic Flash Programming (Convert Programming File Dialog Box)
1.3.1. Generic Flash Programming (Programming File Generator) x
1.3.1.1. Step 1: Generate Primary Device Programming File 1.3.1.2. Step 2: Generate Secondary Programming Files (Programming File Generator) 1.3.1.3. Step 3: Program the Flash Memory Device
1.3.1.2. Step 2: Generate Secondary Programming Files (Programming File Generator) x
1.3.1.2.1. Enabling Bitstream Authentication (Programming File Generator) 1.3.1.2.2. Enabling Bitstream Encryption (Programming File Generator) 1.3.1.2.3. Defining a New Flash Memory Configuration Device
1.3.1.2.1. Enabling Bitstream Authentication (Programming File Generator) x
1.3.1.2.1.1. Specifying Additional Physical Security Settings (Programming File Generator)
1.3.2. Generic Flash Programming (Convert Programming File Dialog Box) x
1.3.2.1. Step 1: Generate Primary Device Programming Files 1.3.2.2. Step 2: Generate Secondary Programming Files (Convert Programming Files) 1.3.2.3. Step 3: Program the Flash Memory Device 1.3.2.4. Full Erase of Flash Memory Sectors
1.3.2.2. Step 2: Generate Secondary Programming Files (Convert Programming Files) x
1.3.2.2.1. Enabling Bitstream Encryption or Compression for Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices 1.3.2.2.2. Defining a New Flash Memory Device 1.3.2.2.3. Modifying Programming Flows
1.4. Generic Flash Programmer Flow Templates ( Intel® Stratix® 10 devices) x
1.4.1. Initialization Flow Template ( Intel® Stratix® 10 Devices) 1.4.2. Program Flow Template ( Intel® Stratix® 10 Devices) 1.4.3. Erase Flow Template ( Intel® Stratix® 10 Devices) 1.4.4. Verify/Blank-Check/Examine Flow Template ( Intel® Stratix® 10 Devices) 1.4.5. Termination Flow Template ( Intel® Stratix® 10 Devices)
1.5. Generic Flash Programmer Flow Templates ( Intel® Arria® 10 and Intel® Cyclone® 10 GX) x
1.5.1. Initialization Flow Templates ( Intel® Arria® 10 and Intel® Cyclone® 10 GX) 1.5.2. Program Flow Template ( Intel® Arria® 10 and Intel® Cyclone® 10 GX) 1.5.3. Erase Flow Template ( Intel® Arria® 10 and Intel® Cyclone® 10 GX) 1.5.4. Verify/Blank-Check/Examine Flow Template ( Intel® Arria® 10 and Intel® Cyclone® 10 GX) 1.5.5. Termination Flow Template ( Intel® Arria® 10 and Intel® Cyclone® 10 GX) 1.5.6. Programming Flow Action Properties
1.6. Generic Flash Programmer Settings Reference x
1.6.1. Device and Pin Options 1.6.2. More Security Options Dialog Box 1.6.3. Input Files Tab Settings (Programming File Generator) 1.6.4. Output Files Tab Settings (Programming File Generator) 1.6.5. Add Partition Dialog Box (Programming File Generator) 1.6.6. Bitstream Co-Signing Security Settings (Programming File Generator) 1.6.7. Convert Programming File Dialog Box 1.6.8. Compression and Encryption Settings (Convert Programming File) 1.6.9. SOF Data Properties Dialog Box (Convert Programming File) 1.6.10. Select Devices (Flash Loader) Dialog Box
1. Generic Flash Programmer User Guide Intel® Quartus® Prime Pro Edition

1.3.1.2.3. Defining a New Flash Memory Configuration Device

You can define and store the settings for a new flash memory device, based on the programming flow template of an existing supported flash memory device. You can customize and preserve the properties of the new flash memory device as a template for subsequent reuse, and define other flash memory devices based the template.

For Intel® Agilex™ and Intel® Stratix® 10 devices, the Secure Device Manager (SDM) firmware controls the flash programming flows, and you cannot modify these flows. For Intel® Arria® 10 and Intel® Cyclone® 10 GX devices, you can modify and preserve the default programming flows, as Modifying Programming Flows describes.

When you define a new flash memory device, Intel® Quartus® Prime software stores the collection of settings in an .xml file automatically in the Custom database directory location that you can specify.

Define New Flash Device ( Intel® Stratix® 10 Example)
Follow these steps to define a new flash memory device:
  1. Perform one of the following to generate a .jic file for flash programming:
  2. For the Configuration Device option, select <<new device>>. The settings on this and other tabs become available.
  3. For Programming flow template, select an existing flash memory device template for the new device initial settings, or define a flash programming flow for a different flash memory vendor based on an existing template.
  4. Specify the remaining settings on the Configuration Device tab:
    Table 5.  Configuration Device Tab Settings
    Option Description
    Device name Specify a unique name for the flash not already listed in the Name column. The Name must not contain any empty string (space) or special characters (except "_").
    Device ID Specify the 3-byte ID that the Programmer Auto-Detect operation uses to detect the flash programming device, such as 0x20 0xBB 0x21.
    Device I/O voltage Specify 1.8V or 3.0/3.3V to match your memory device specification.
    Device density Select the total density that corresponds with your flash memory device size.
    Total device die Specify the total number of die for a stacked device (where applicable).
    Single I/O mode dummy clock Specify the Fast Read dummy clock cycle for flash device in single I/O protocol. The programming file generation uses this setting to determine if the configuration requires bit shifting to compensate for the actual dummy clock cycle during Active Serial configuration.
    Quad I/O mode dummy clock Specify the Fast Read dummy clock cycle for flash device in Quad I/O protocol. The programming file generation uses this setting to determine if the configuration requires bit shifting to compensate for the actual dummy clock cycle during Active Serial configuration.
    Custom database directory Specifies the location of the .xml file that preserves a flash memory device definition and flow information. The default location is the project directory or current working directory.
    Note: When you specify a non-default folder for the Custom database directory location, place the .sof and .jic files in the same folder as the .xml file to avoid missing a defined flash database or corruption of the .jic file.
    Save as template Enable this option and specify a unique name to save the current flash memory device definition as a template for later use. Programming File Generator saves the template in the Custom database directory. Click the Edit button to delete any templates you save.
  5. For supported FPGA devices, optionally modify any of the default programming flows for the flash memory device, as Modifying Programming Flows describes.
    Note: When you modify a programming flow, all .jic files using this programming flow are affected. For example, you can define a new micron_1gb flow, and then use this device to define the micro_1gb_partA.jic file. Later, you modify themicron_1gb flow, and then use this flow to create micro_1gb_partB.jic. In this example, micro_1gb_partA programming flow reflects the latest modifications to micron_1gb.
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