ID
683465
Date
4/15/2021
Public
Visible to Intel only — GUID: fcu1469020986911
Ixiasoft
1. About the UHD HDMI 2.0 Video Format Conversion Design Example
2. UHD HDMI 2.0 Video Format Conversion Design Example Getting Started
3. UHD HDMI 2.0 Video Format Conversion Design Example Functional Description
4. Considering Design Security
5. UHD HDMI 2.0 Video Format Conversion Design Example Document Revision History
A. HDMI RX Interface Register Map
B. HDMI TX Interface Register Map
2.1. Hardware and Software Requirements for the UHD HDMI 2.0 Video Format Conversion Design Example
2.2. Downloading and Installing the UHD HDMI 2.0 Video Format Conversion Design Example
2.3. Setting up the Intel® Arria® 10 FPGA development board
2.4. Compiling the UHD HDMI 2.0 Video Format Conversion Design Example
2.5. Compiling the UHD HDMI 2.0 Video Format Conversion Design Example with the Nios II Software Tools for Eclipse
2.6. Running the UHD HDMI 2.0 Video Format Conversion Design Example on the Hardware
Visible to Intel only — GUID: fcu1469020986911
Ixiasoft
1. About the UHD HDMI 2.0 Video Format Conversion Design Example
The ultra-high-definition (UHD) HDMI 2.0 video format conversion design example integrates the Intel HDMI 2.0 video connectivity IP with a video processing pipeline based on Intel® FPGA IP from the Intel Video and Image Processing Suite.
The design delivers high-quality scaling, color space conversion, and frame rate conversion for video streams up to 4K at 60 frames per second. The design is highly software and hardware configurable, enabling rapid system configuration and redesign. The design targets Intel® Arria® 10 devices and uses the latest 4K ready IP from the Video and Image Processing Suite in the Intel® Quartus® Prime Design Suite.
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