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1. Answers to Top FAQs
2. Overview of the Intel® FPGA Power and Thermal Calculator
3. Estimating Power Consumption with the Intel® FPGA Power and Thermal Calculator
4. Intel® FPGA Power and Thermal Calculator Graphical User Interface
5. Intel® FPGA Power and Thermal Calculator Pages
6. Factors Affecting the Accuracy of the Intel® FPGA PTC
7. Intel® FPGA Power and Thermal Calculator User Guide Archive
8. Document Revision History for the Intel® FPGA Power and Thermal Calculator User Guide
A. Measuring Static Power
5.1. Intel® FPGA PTC - Power Summary
5.2. Intel® FPGA PTC - Common Page Elements
5.3. Intel® FPGA PTC - Main Page
5.4. Intel® FPGA PTC - Logic Page
5.5. Intel® FPGA PTC - RAM Page
5.6. Intel® FPGA PTC - DSP Page
5.7. Intel® FPGA PTC - Clock Page
5.8. Intel® FPGA PTC - PLL Page
5.9. Intel® FPGA PTC - I/O Page
5.10. Intel® FPGA PTC - Transceiver Page
5.11. Intel® FPGA PTC - HPS Page
5.12. Intel® FPGA PTC - Crypto Page
5.13. Intel® FPGA PTC - HBM Page
5.14. Intel® FPGA PTC - Thermal Page
5.15. Intel® FPGA PTC - Report Page
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2.3. Definitions of Power Terms Used in this Document
The total power consumption of an Intel® Agilex™ or Intel® Stratix® 10 device consists of the following components:
- Static power—the power that the configured device consumes when powered up but no user clocks are operating. Static power is dependent on device size, device grade, power characteristics, and junction temperature. Static power excludes DC bias power of analog blocks, such as I/O and transceiver analog circuitry.
- Dynamic power—the additional power consumption of the device due to signal activity or toggling.
- Standby power—for Intel® Stratix® 10 devices only: additional power, independent of signal activity or toggling, that is consumed only when specific circuitry is enabled through configuration RAM settings. Standby power includes, but is not limited to, I/O and transceiver DC bias power. For Intel® Agilex™ devices, this power is included as part of the reported dynamic power.