Intel FPGA Programmable Acceleration Card N3000-N Data Sheet

Download PDF
ID 683434
Date 12/11/2020
Public
Document Table of Contents
Document Table of Contents x
1. Introduction 2. Overview 3. System Compatibility 4. Mechanical Information 5. Thermal Specifications 6. Intel® Provided FPGA Image A. References B. Safety and Regulatory Information C. Document Revision History for the Intel FPGA Programmable Acceleration Card N3000-N Data Sheet
2. Overview x
2.1. Intel® FPGA PAC N3000-N Block Diagram 2.2. Overview of Product Features 2.3. PCIe Overview 2.4. Board Management Controller Overview
2.2. Overview of Product Features x
2.2.1. Intel® Arria® 10 GT FPGA 2.2.2. Intel® Ethernet Controller XL710-BM2 Network Interface Controller 2.2.3. On-Board Memory 2.2.4. Software and Firmware 2.2.5. Power 2.2.6. Network Interface
2.2.6. Network Interface x
2.2.6.1. Intel® Ethernet Connection C827 Retimer
2.4. Board Management Controller Overview x
2.4.1. Field Replaceable Unit Identification (FRUID) EEPROM
5. Thermal Specifications x
5.1. Cooling Requirements
B. Safety and Regulatory Information x
B.1. Regulatory Compliance
1. Introduction
2. Overview
3. System Compatibility
4. Mechanical Information
5. Thermal Specifications
6. Intel® Provided FPGA Image
A. References
B. Safety and Regulatory Information
C. Document Revision History for the Intel FPGA Programmable Acceleration Card N3000-N Data Sheet

5.1. Cooling Requirements

Figure 8. Forward and Reverse Flow Cooling Curve
Note: Cooling curve generated in a ducted wind-tunnel configuration using 2 x 2 x 25G configuration with 5 C FPGA junction temperature margin.
Note: Your in-system testing is required to confirm cooling capability of server and Intel® FPGA PAC N3000-N installation.
Table 9.  Local Air Inlet Temperature and Air Flow Values for Forward and Reverse Cooling
FPGA Power = 65 W FPGA Power = 70 W
TLA (°C) Air Flow (CFM) TLA (°C) Air Flow (CFM)
48 14.7 45 14.7
52 17.5 49 17.5
56 22.0 53 22.0
Note: TLA values shown in the tables and charts of this section are informational for maintaining junction temperature and board temperature within thermal limits, and may represent conditions outside of the supported operating range.
Note: These flow curves are based on numerical analysis and wind tunnel testing and should be used as a starting point for thermal design estimation. Thermal performance of host systems may vary. Therefore, you should perform in-system thermal validation using the thermal power load (TPL) FPGA workload provided with the Intel FPGA Programmable Acceleration Card N3000-N Platform Qualification Guidelines. Contact your Intel® Sales representative to obtain this guide and TPL FPGA workload.
Level Two Title