H-Tile Hard IP Ethernet Intel® FPGA IP User Guide: Stratix® 10 Devices

ID 683430
Date 5/03/2024
Public
Document Table of Contents

B.2.8. Frame Errors Detected

Frame error(s) detected.

Offset: 0x323

Access: RO

Frame Errors Detected Fields

Bit Name Description Access Reset
19:0 frmerr Frame error(s) detected
  • 1: A frame error was detected on corresponding lane
  • For 100G links, bits 19:0 are used, corresponding to Virtual lanes 0 to 19
  • This bit is sticky, and must be cleared by asserting sclr_frame_error
RO 0x0