Visible to Intel only — GUID: bhc1395127803837
Ixiasoft
Visible to Intel only — GUID: bhc1395127803837
Ixiasoft
6.8.1. Avalon® Streaming Interface TX Status Signals
Signal | Direction | Width | Description |
---|---|---|---|
avalon_st_txstatus_valid | Out | 1 | When asserted, this signal qualifies the avalon_st_txstatus_data[] and avalon_st_txstatus_error[] signals. |
avalon_st_txstatus_data[] | Out | 40 | Contains information about the TX frame.
This status signal is valid only if the TX frame is valid. For example, bit 35 is not asserted if a pause frame is oversized. |
avalon_st_txstatus_error[] | Out | 7 | When set to 1, the respective bit indicates the following error type in the TX frame:
The error status is invalid when an overflow occurs. |
avalon_st_tx_pfc_status_valid | Out | 1 | When asserted, this signal qualifies the avalon_st_tx_pfc_status_data[] signal. This signal applies only to 10G operating mode. |
avalon_st_tx_pfc_status_data[] | Out | n (4 - 16) |
n = 2 × Number of PFC queues parameter. When set to 1, the respective bit indicates the flow control request to the remote partner, for example:
When a pair of bits (Example: Bit 0 and Bit 1, Bit 3 and Bit 4, etc.) is set to 0, the respective bit indicates there is no flow control frame sent. This signal applies only to the 10G operating mode. |