Intel® Stratix® 10 Embedded Memory User Guide

ID 683423
Date 9/26/2022
Public

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2.12. Intel® Stratix® 10 Embedded Memory Configurations

Table 12.  Supported Embedded Memory Block ConfigurationsThis table lists the maximum configurations supported for the Intel® Stratix® 10 embedded memory blocks.
Embedded Memory Block Depth (bits) Programmable Width
MLAB 32 ×16, ×18, or ×20
M20K 512 ×32 or ×40
Note: For simple dual-port only.
1024 ×16 or ×20
Note: For simple dual-port and true dual-port.
2048 ×8 or ×10
Note: For simple dual-port, true dual-port, and simple quad-port.
eSRAM 2048×42 3 x72 3
3 The eSRAM channel depth and width can be programmably reduced to realize power savings. Refer to eSRAM Intel® FPGA IP section for further details.