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2.2. Power-On Reset Circuitry
The POR circuitry keeps the Intel® MAX® 10 device in the reset state until all power supplies reach the recommended operating range during device power up. The individual power supply must reach the recommended operating range within the maximum power supply ramp time, tRAMP.
If the ramp time, tRAMP, is not met, the Intel® MAX® 10 device I/O pins and programming registers remain tri-stated, during which device configuration could fail.
The Intel® MAX® 10 device POR circuit monitors the following power rails during power up regardless of the power supply device options:
- VCC or regulated VCC_ONE
- VCCIO of banks 1B and 8 2
- VCCA
The POR circuitry also ensures VCCIO level of I/O banks 1B and 82 that contain configuration pins reach an acceptable level before configuration is triggered.
2 VCCIO of banks 1 and 8 for the 10M02 device.