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1. About the Serial Lite IV Intel Agilex® 7 FPGA IP Design Example User Guide
2. Quick Start Guide
3. Detailed Description for Serial Lite IV Design Example
4. Serial Lite IV Intel Agilex® 7 FPGA IP Design Example User Guide Archives
5. Document Revision History for the Serial Lite IV Intel Agilex® 7 FPGA IP Design Example User Guide
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2.3.2. Directory Structure
The Intel® Quartus® Prime Pro Edition software generates the design example files in the following folders:
- <user_defined_design_example_directory>/ed_sim
- <user_defined_design_example_directory>/ed_synth
- <user_defined_design_example_directory>/ed_hwtest
The following diagrams show the directories that contain the generated files for the design example.
Figure 5. Directory Structure for Intel Agilex® 7 Serial Lite IV Design Example
Directory/File | Description |
---|---|
ed_sim/tb_components | The directory that contains the testbench files. |
ed_sim/common | The directory that contains the .tcl scripts for all the simulators. |
ed_sim/cadence ed_sim/mentor ed_sim/xcelium ed_sim/synopsys/vcs |
The directories that contain the simulation scripts. These directories also serve as a working area for the simulators. |
ed_sim/seriallite4_dup | The directory that contains the design example simulation source files. |
ed_sim/seriallite4_dup.ip | IP-XACT representation of the design. |
ed_synth/seriallite_iv_streaming_demo.qpf | Intel® Quartus® Prime Pro Edition project file. |
ed_synth/seriallite_iv_streaming_demo.qsf | Intel® Quartus® Prime Pro Edition settings file. |
ed_synth/seriallite_iv_streaming_demo.sdc | Synopsys Design Constraints (SDC) file. |
ed_synth/src | The directory that contains the design example synthesizable components. |
ed_synth/src/seriallite_iv_streaming_demo.v | Design example top-level HDL. |
ed_synth/demo_control |
The directory for each synthesizable component including Platform Designer-generated IPs, such as Demo Management and Demo Control modules. |
ed_hwtest | The directory that contains the design example hardware setup files. |
ed_hwtest/Readme.txt | Instruction file to download the generated design example on the development kit. |
ed_hwtest/system_console | The directory that contains system console scripts that provide useful commands to read statistics and to test the hardware design. |
ed_hwtest/sliv_ip_toolkit_agilex | The folder that contains the scripts to invoke the Serial Lite IV IP toolkit for Intel Agilex® 7 devices. This toolkit is a user-friendly GUI that provides step-by-step link initialization and debugging. |
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