AN 747: Implementing PHYLite in Intel® Arria® 10 Devices Design Examples

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ID 683384
Date 5/08/2017
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Document Table of Contents
Document Table of Contents x
1. AN 747: Altera PHYLite for Parallel Interfaces Loopback Reference Designs Application Note
1. AN 747: Altera PHYLite for Parallel Interfaces Loopback Reference Designs Application Note x
1.1. Simple Input/Output PHYLite Simulation Design Example 1.2. Simple Input/Output PHYLite with Dynamic Reconfiguration Hardware Reference Design 1.3. Functional Description 1.4. Document Revision History
1.1. Simple Input/Output PHYLite Simulation Design Example x
1.1.1. Simulation Design Example Architecture 1.1.2. Simulation Reference Design User Guide 1.1.3. Result
1.1.2. Simulation Reference Design User Guide x
1.1.2.1. Requirements 1.1.2.2. Setting Up the Simulation Environment 1.1.2.3. Running Simulation
1.2. Simple Input/Output PHYLite with Dynamic Reconfiguration Hardware Reference Design x
1.2.1. Hardware Reference Design Architecture 1.2.2. Hardware Design Example User Guide 1.2.3. Result
1.2.2. Hardware Design Example User Guide x
1.2.2.1. System Requirements 1.2.2.2. Setting Up the Development Kit 1.2.2.3. Generating Executable and Linking Format (.elf) Programming File 1.2.2.4. Running the Hardware Reference Design
1.2.3. Result x
1.2.3.1. Dynamic Calibration Result 1.2.3.2. Random Data Transfer Result
1. AN 747: Altera PHYLite for Parallel Interfaces Loopback Reference Designs Application Note

1.2.2.3. Generating Executable and Linking Format (.elf) Programming File

Follow the steps below to generate an executable and linking format (.elf) programming file. These steps are necessary if you modify the phylite_dynamic_reconfiguration.c, phylite_dynamic_reconfiguration.h and hello_world.c files.

  1. In the Intel® Quartus® Prime software version 15.1, select Tools > Nios II Software Build Tools for Eclipse .
  2. Create a new workspace when the Select a workspace window prompt appears.
  3. A Nios II - Eclipse window appears. Select File > New > Nios II Application and BSP from Template .
  4. In the SOPC Information File name parameter, browse to the location of phylite_nios.sopcinfo file in your host machine. Click OK to select the file and Eclipse automatically loads all CPU settings.
  5. In the Project name parameter, specify your desired project name. This example uses phylite_nios_1DQ2DQS_new.
  6. Choose Hello World as the project template.
  7. Click Finish to generate the project. Intel® Quartus® Prime software creates a new directory named software in the specified project location.
    Figure 15. Nios II Application and BSP from Template Settings
  8. Replace the following files from <project directory>/software reference design with the files located in your new software directory.
    • hello_world.c
    • phylite_dynamic_reconfiguration.c
    • phylite_dynamic_reconfiguration.h
  9. In the Nios II - Eclipse window, press F5 to refresh the window and reload the new files into the project.
  10. Click Project > Build Project.
  11. Make sure the phylite_nios_1DQ2DQS_new.elf file is generated in the new <project directory>/software/phylite_nios_1DQ2DQS_new/ directory.
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