AN 796: Cyclone® V and Arria® V SoC Device Design Guidelines

ID 683360
Date 3/30/2022
Public
Document Table of Contents

3.1.1. Recommended Starting Point for HPS-to-FPGA Interface Design

Depending on your topology, you can choose one of the two hardware reference designs as a starting point for your hardware design.

GUIDELINE: Use the Golden System Reference Design (GSRD) as a starting point for a loosely coupled system.

The Golden Hardware Reference Design (GHRD) has the optimum default settings and timing that you can use as a basis for your "getting started" system. After initial evaluation, you can move on to the Cyclone® V HPS-to-FPGA Bridge Design Example reference design to compare performance among the various FPGA-HPS interfaces.

Refer to "Golden Hardware Reference Design" for more information.

GUIDELINE: Use the Cyclone® V HPS-to-FPGA Bridge Design Example reference design to determine your optimum burst length and data-width for accesses between FPGA logic and HPS.

The Cyclone® V FPGA-to-HPS bridge design example contains modular SGDMAs in the FPGA logic that allow you to program the burst length for data accesses from the FPGA logic to the HPS.