Visible to Intel only — GUID: mwh1410805286704
Ixiasoft
1.1. Features
1.2. Overview
1.3. Programming Single and Multiple Serial Configuration Devices with the Intel® FPGA Serial Flash Loader IP Core
1.4. Using the Intel® FPGA Serial Flash Loader IP Core in the Intel® Quartus® Prime Software
1.5. Generating .jic and .jam Programming Files in the Intel® Quartus® Prime Software
1.6. Programming Serial Configuration Devices with the Intel® Quartus® Prime Programmer
1.7. Features for Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices
1.8. Intel® FPGA Serial Flash Loader IP Core Parameter
1.9. Intel® FPGA Serial Flash Loader IP Core Signals
1.10. Document Revision History for AN 370: Using the Intel® FPGA Serial Flash Loader IP Core with the Intel® Quartus® Prime Software
Visible to Intel only — GUID: mwh1410805286704
Ixiasoft
1.1. Features
The Intel® FPGA Serial Flash Loader IP core allows you to:
- Configure your FPGA and program your serial configuration devices using the same JTAG interface.
- Correctly interpret extra padding bits introduced by third-party programmer tools to ensure successful serial configuration device programming using the Use enhanced mode SFL parameter.
Extended Features for Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices
The Intel® FPGA Serial Flash Loader IP core supports Intel® Arria® 10 and Intel® Cyclone® 10 GX devices with the following features:
- Multiple serial configuration devices—up to three cascaded identical serial configuration devices can be used to store a single configuration file.
- Multiple-die serial configuration devices—up to four stacked-die serial configuration device can be used to store a single configuration file.
- Boot page selection—specify the boot page for design multiple SRAM object file (.sof).