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1.1. Features
1.2. Overview
1.3. Programming Single and Multiple Serial Configuration Devices with the Intel® FPGA Serial Flash Loader IP Core
1.4. Using the Intel® FPGA Serial Flash Loader IP Core in the Intel® Quartus® Prime Software
1.5. Generating .jic and .jam Programming Files in the Intel® Quartus® Prime Software
1.6. Programming Serial Configuration Devices with the Intel® Quartus® Prime Programmer
1.7. Features for Intel® Arria® 10 and Intel® Cyclone® 10 GX Devices
1.8. Intel® FPGA Serial Flash Loader IP Core Parameter
1.9. Intel® FPGA Serial Flash Loader IP Core Signals
1.10. Document Revision History for AN 370: Using the Intel® FPGA Serial Flash Loader IP Core with the Intel® Quartus® Prime Software
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1.7.2. Boot Page Selection
For design with more than one SOF page, you can select to boot from any pages available. To select the boot page, click the Option/Boot Info button in Convert Programming File toll and select the page available from the drop down menu. By default, the page number will be set at page_0.