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1.2.1. BMS Reference Design Software Requirements
1.2.2. BMS Reference Design Hardware Requirements
1.2.3. Downloading and Installing the BMS Reference Design
1.2.4. Setting Up the MAX 10 Development Board
1.2.5. Compiling the FPGA Hardware Design for the BMS Reference Design
1.2.6. Compiling the Nios Software for the BMS Reference Design
1.2.7. Programming the BMS Reference Design Hardware onto the Device
1.2.8. Downloading the BMS Reference Design Nios II Software to the Device
1.2.9. MATLAB Simulink Top-Level Design for the BMS Reference Design
1.2.10. Running the BMS Reference Design in a System-in-the-Loop Simulation
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1.2.5. Compiling the FPGA Hardware Design for the BMS Reference Design
You can compile your design or use the Altera-provided pre-compiled .sof and .pof from the /master_image directory of your reference design
- Launch Quartus II software.
- Open project bms_soc_max10m50.qpf.
- Click Processing > Start Compilation.
Note: You may edit the reference design project in Qsys.