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1.2.1. BMS Reference Design Software Requirements
1.2.2. BMS Reference Design Hardware Requirements
1.2.3. Downloading and Installing the BMS Reference Design
1.2.4. Setting Up the MAX 10 Development Board
1.2.5. Compiling the FPGA Hardware Design for the BMS Reference Design
1.2.6. Compiling the Nios Software for the BMS Reference Design
1.2.7. Programming the BMS Reference Design Hardware onto the Device
1.2.8. Downloading the BMS Reference Design Nios II Software to the Device
1.2.9. MATLAB Simulink Top-Level Design for the BMS Reference Design
1.2.10. Running the BMS Reference Design in a System-in-the-Loop Simulation
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1. Battery Management System Reference Design
The Altera® Battery Management System (BMS) Reference Design demonstrates battery state of charge (SOC) estimation in an FPGA-based real-time control platform that you can extend to include other BMS functionality such as battery state-of-health monitoring and charge equalization (cell balancing). It uses a dual extended Kalman filter (DEKF) algorithm to estimate SOC values for 96 cells, using a MAX® 10 development kit. The reference design’s system-in-the-loop simulation runs on the MATLAB Simulink software.
A BMS is a critical component in high-value battery powered applications such as electric vehicles or energy storage. A BMS maintains the health of all the cells in the battery pack to deliver the power needed by the application. It also protects the cells from damage and maintains all the cells within the manufacturer-recommended operating conditions to prolong the life of the battery pack.
You can use an FPGA as a flexible and powerful platform for a BMS, using its high I/O count for parallel connections to many battery modules. An FPGA can accelerate processor-intensive calculations such as state-of-charge estimation.