Visible to Intel only — GUID: bhc1410500781411
Ixiasoft
Overview of the Design Security Feature
Hardware and Software Requirements
Steps for Implementing a Secure Configuration Flow
Steps to Enable Tamper-Protection Bit Programming
Supported Configuration Schemes
Security Mode Verification
Serial Flash Loader Support with Encryption Enabled
Serial Flash Loader Support with Encryption Enabled for Single FPGA Device Chain
JTAG Secure Mode for 28-nm and 20-nm FPGAs
Document Revision History for AN 556: Using the Design Security Features in Intel® FPGAs
Generating Single-Device .ekp File and Encrypting Configuration File using Intel® Quartus® Prime Software
Generating Single-Device .ekp File and Encrypting Configuration File using Command-Line Interface in Intel® Quartus® Prime Software
Generating Multi-Device .ekp File and Encrypting Configuration File using Intel® Quartus® Prime Software
Programming Volatile or Non-Volatile Key using Intel® FPGA Ethernet Cable and Intel® Quartus® Prime Software
Programming Single-Device Volatile or Non-Volatile Key using Intel® Quartus® Prime Software
Programming Single-Device Volatile or Non-Volatile Key using the Command-Line Interface in Intel® Quartus® Prime Software
Programming Multi-Device Volatile or Non-Volatile Key using Intel® Quartus® Prime Software
Programming Multi-Device Volatile or Non-Volatile Key using the Command-Line Interface in Intel® Quartus® Prime Software
Programming Key using JTAG Technologies
Visible to Intel only — GUID: bhc1410500781411
Ixiasoft
Serial Flash Loader Support with Encryption Enabled for Single FPGA Device Chain
To use the Serial Flash Loader IP core with the encryption feature enabled in a single FPGA device chain, follow these steps:
- Start the Intel® Quartus® Prime software.
- Instantiate the Serial Flash Loader IP core in your FPGA top-level design.
- Compile your design with one of the following options. An unencrypted .sof is generated.
- On the Processing menu, click Start Compilation; or
- On the Processing menu, point Start and click Start Assembler.
- Follow these steps to convert a .sof to a .jic file:
- On the File menu, choose Convert Programming Files.
- In the Convert Programming Files dialog box, scroll to the JTAG Indirect Configuration File (.jic) from the Programming file type field.
- In the Configuration device field, specify the serial configuration device.
- In the File name field, browse to the target directory and specify an output file name.
- Highlight the .sof data in the Input files to convert section.
- Click Add File.
- Select the .sof file that you want to convert to a .jic file.
- Click OK.
- Click on the .sof file name to encrypt the .sof file.
Note: To encrypt the .sof file, refer to step 7 of Generating Single-Device .ekp File and Encrypting Configuration File using Intel Quartus Prime Software.
- Highlight Flash Loader and click Add Device.
- Click OK. The Select Devices page appears.
- Select the target FPGA that you are using to program the serial configuration device.
- Click OK.
- Program the serial configuration device with the encrypted .jic file.
- Program the key into the FPGA device.
Note: To program the key to a single FPGA device, follow the steps in Programming Single-Device Volatile or Non-Volatile Key using Intel Quartus Prime Software.
- The encrypted FPGA is then configured by the programmed serial configuration device.
Note: To program the key with a .jam file, you must convert the .jic file to a .jam file.
Related Information